Technology-licensing programme for PCB fabrication

The license is available to laminate and prepreg manufacturers and users worldwide and is protected by U.S. patent number 6,083,855, Taiwan patent number I230657, patents in several additional countries and by know-how.

Advancements in laminate manufacturing procedures, as well as the resins and reinforcing materials used in the laminates, have resulted in laminate products that are manufactured quickly and efficiently with a high degree of strength and reliability. Laminates are prepared by impregnating a fibrous reinforcement material with a blend of liquid resin polymeric. The impregnated fabric is then heated and brought to a semi-cured, tack-free stage called prepreg. In the absence of an effective "void reduction" technology, prepregs typically include voids, such as small air pockets in the fibre bundles and in the interstitial spaces between the fibre bundles, which are a common source of CAF problems The next step in the manufacturing process of a copper-clad laminate is the lamination of the prepreg between thin layers of copper foil, by the application of an appropriate temperature and pressure profile. A majority of the voids in the prepreg get locked-up in this final, fully cured state.

Isola’s technology-licensing program provides a laminate impregnation process that is capable of producing high quality, resin-impregnated prepreg, substantially free of voids, which mitigates CAF failure. CAF is of constant concern to original equipment manufacturers and PCB designers, as they strive to improve the reliability and quality of their products. Smaller hole-pitch geometries make PCBs susceptible to CAF growth, a form of electromechanical migration within the board.

CAF failures may occur for several reasons, including: incompatibility of the silane finish with the resin or the glass; weak interfacial bond between the resin and the glass; hollow fibres (as a result of the yarn manufacturing process); poor drilling at the PCB fabricator, leading to crazing and debonding; and voids after the impregnation process (these are often referred to as interlaminar yarn voids (IYVs), striations and in some special cases, triple points).

Tarun Amla, Executive Vice-president and Chief Technology Officer, Isola, noted that the current trend in electronics manufacturing toward smaller, thinner, lighter-weight and higher-performance products results in a tighter pitch between the interconnect holes drilled in PCBs.

Amla commented: “Voids in the dielectric act as precursors to CAF pathways, causing early failures and thus pose serious reliability and safety risks. An effective risk-mitigation technique will reduce or eliminate the voids that develop during the impregnation process."