UVM-based verification accelerates customer schedules

Using source code UVM compliance test suites, Wipro can achieve coverage goals and have confidence in the robustness of the SoC interfaces. The devices in which Wipro have chosen to use Synopsys VIP for include ARM AMBA interconnect, USB 3.0, MIPI CSI-2, MIPI DSI, PCI Express and SDIO. To reduce time to verification closure, the VIP includes built-in coverage, test plans, error injection, protocol-aware debug and test suites. The SystemVerilog-based VIP, which removes the need for gaskets or wrappers that slow down performance, is easier to integrate and use in SystemVerilog UVM testbenches. 

"Wipro provides premium verification services across the industry for a wide variety of SoC designs and prides itself on its high quality and on-time completion of projects. To achieve this, we utilise the most advanced methodologies and technologies," said Prasad Bhatt, Vice President, Product Engineering Services, Wipro. "We have collaborated with Synopsys over many projects and depend on their high-quality verification IP and test suites, that fit our advanced UVM-based methodologies, to enable us to deliver high-quality and quick turnaround time to our customers." 

"We have collaborated with many design verification teams to address the increasing challenges of SoC verification using advanced technologies. With the growing size and complexity of SoCs, VIP is becoming an increasingly important technology to verify chip designs," said Debashis Chowdhury, Vice President of R&D for the Synopsys Verification Group. "With our portfolio of leading native SystemVerilog VIP for buses, interfaces and memories, we continue to offer SoC teams the verification and compliance environments needed to build and verify differentiated products and get them to market quickly."