Alphawave awarded research grant

Data from Meta indicates that AI processors can be idle roughly two-fifths of the time waiting for data from the network, wasting costly resources.

To address this and similar challenges that hinder cost-effective AI scaling, ARIA is driving a shift toward more efficient processing systems capable of handling complex data. It has awarded £50 million ($65 million) to 12 organisations, which include Alphawave Semi, to focus on advancing networking and interconnect technologies.

"It’s clear that new connectivity solutions are essential to support sustainable AI scaling. Innovation is needed throughout the technology stack, from 224Gbps to 448Gbps component technologies to networking, compute architectures, and algorithm development," said Tony Chan Carusone, Chief Technology Officer, Alphawave Semi. "We'll be developing cutting-edge technologies that enable significantly higher interconnectivity within clusters of AI accelerators. We’re proud to leverage our leadership and established partnerships in chiplet-based connectivity for this project. Our solutions will impact the future of AI over the long term."

Alphawave Semi recently announced it taped out the first multi-protocol I/O connectivity chiplet for high performance compute, and developed the first 3 nm IP for UCIe, the open chiplet communication protocol, in partnership with TSMC. UCIe and Chiplet-related partnerships are also in place with other companies, including Samsung and Arm.

Other projects in ARIA’s bid to alleviate dependence on leading-edge chip manufacturing include software simulators to map whole-system performance, cost and power requirements, as well as advances in computational primitives.