Alphawave Semi has been awarded a research grant from the UK's Advanced Research + invention Agency (ARIA) to address networking bottlenecks that are limiting AI's growth.

Alphawave Semi has announced the availability of the industry's first 3nm silicon-proven Universal Chiplet Interconnect Express (UCIe) Die-to-Die (D2D) IP subsystem.

Alphawave Semi will showcase its latest innovations in AI and connectivity IP at the European Conference on Optical Communication (ECOC) in Frankfurt. 

Alphawave Semi has announced the appointment of Sameer Ladiwala as SVP Finance & Chief Accounting Officer (CAO).  

Alphawave Semi has launched the industry's first 3nm successful silicon bring-up of Universal Chiplet Interconnect Express (UCIe) Die-to-Die (D2D) IP with TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technology.

Alphawave Semi has unveiled a 9.2 Gbps HBM3E sub-system (PHY + Controller IP) silicon platform. 

Alphawave Semi, a global pioneer in high-speed connectivity and compute silicon for the world’s technology infrastructure, has announced a 9.2Gbps HBM3E sub-system (PHY + Controller IP) silicon platform.

Alphawave Semi has unveiled a 9.2 Gbps HBM3E sub-system (PHY + Controller IP) silicon platform.

Alphawave Sem has announced the successful tape-out of the industry's first off-the-shelf multi-protocol I/O connectivity chiplet on TSMC's 7nm process. 

Alphawave Semi has expanded its strategic partnership with Samsung Foundry. The expanded agreement encompasses leading-edge IP for PCI Express 7.0, 112G and 224G Ethernet and the latest UCIe (Universal Chiplet Interconnect Express) die-to-die interconnect standard that is enabling next-generation SoC (system-on-chip) technologies for AI and other HPC systems.