CMOS SAW-less digital transmitter enables advanced 3, 4 & 5G

Analogue transmitters are less suitable for integration in advanced CMOS nodes. Digital transmitters are more compact and more robust to transistor imperfections and mismatches compared to analog transmitters, but they typically fall short with respect to high-end performance requirements such as out-of-band noise and spurious emission. Imec and VUB overcome this with a new transmitter architecture that combines the best of both worlds.

The incremental-charge-based DAC (QDAC) conversion, allows full direct digital control of the transmitted signal, while at the same time enables intrinsic noise filtering that reduces out-of-band noise and alias components to state-of-the-art levels. The presented prototype features resistor-based QDACs that deliver the required RF power efficiently direct to the 50Ω output load, omitting the need for a power-hungry PA driver.

A peak output power of 3.5dBm and a phase noise of -159Bc/Hz at 45MHz offset from both 900MHz and 2.4GHz modulated carriers is achieved, with an Error Vector Magnitude (EVM) performance of -36dB for a 64-QAM modulated signal. With an active area of only 0.22mm² this architecture is extremely suitable for integration in nanoscale RF CMOS SoCs. These breakthrough results were achieved in the framework of imec’s industrial affiliation program on reconfigurable radio technologies, including industrial partners such as HiSilicon, Panasonic, Murata, Sony and Cadence. The research also received funding through the Flemish HERCULES project VeRONICa.