Standard for voltage regulators breaks the habits for 40nm IoT SoCs

IoT is all about wireless communication, which demands dealing with two major noise issues:

• the ripple loop with the HF-RF, disturbed by the inner frequency of the switching regulator (DC/DC)
• the noise propagation from the logic blocks, such as application processors, at diverse frequencies aggravated by DVFS

Making the right choices for embedding PMNets into SoC is thus challenging and might result in contradictions for the integrator. To satisfy the growing number of ultra low-power SoCs targeting 40nm, Dolphin Integration now provides its Reduced Power Kit Library, fully compliant with the DELTA standard, to facilitate, optimise and secure the implementation of the Power Management Network.

The Reduced Power Kit Library (RPKL) at 40nm encompasses a « kernel » of voltage regulators to cover most SoC requirements: high-efficiency switching regulator, low noise linear regulator, ultra-low quiescent linear regulator.

Per the DELTA rules, each type of voltage regulator is spanning the standardised Interfaces for Distribution of Power (IDP) to support any kind of conventional input voltage of a SoC (from 1.8 up to 5.5V USB), and to supply loads from 3.3 down to 0.55V with a maximum current up to 500mA.

- eSR-Niagara: this switching regulator provides the best compromise between power savings (down to a mere 5% of energy wasted) and small silicon area.

A safe pairing with HF-RF loads is feasible thanks to the characterisation of the ripple and of the noise transfer functions of the eSR.

- qLR-Aubrey: this ultra-low quiescent current Linear Regulator, with an Iq of 150nA including the voltage reference, is ideal to supply loads up to a total of 1mA, as embedded in the always-on power domain.

- nLR-Charny: this ultra low noise linear regulator supplies sensitive analogue converters or RF loads, with a PSSR as low as – 70dB at 10kHz, and with 50μVRMS total integrated noise in the whole bandwidth.

- iLR-Victoria: this linear regulator is best for downstream regulationoflogic loadsor conventional analogue loads. It combines small area with fast load transient and a fast wake-up time.

- Retention Alternative Regulator (RAR): This regulator is suitable to support power islands of a SoC with the lowest waste of energy in each power mode: active and retention down to 0.55V.

To be progressively enriched.

The compliance with the Delta Standard is essential to implement the PMNet of any SoC for:

- Providing designers with proven voltage regulators

- Securing the integration by ensuring the correct matching of the regulators and their loads thanks to relevant specifications and advanced views

- Avoiding iterative design loops by defining a fair distribution between regulator accuracy, IR-drop and load/line transient effects