Parallelism technology reduces regression turnaround time

23rd May 2017

Synopsys Inc

Alice Matthews

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Datasheet

Synopsys has announced that Acacia Communications has successfully deployed Synopsys VCS Fine-Grained Parallelism (FGP) technology in production, to reduce regression turnaround time (TAT) by two times. With its seamless integration into Acacia's VCS simulation regression environment on existing X86 hardware platform, VCS FGP delivered these simulation performance gains without any changes or disruption to the existing simulation flow.

"In order to perform comprehensive verification of our high-speed optical networking and interconnect products, we run daily simulation regressions that include more than 2000 complex test scenarios," said Jon Stahl, ASIC Manager at Acacia Communications. "With VCS FGP we reduced our regression TAT from 20 hours to under 12 hours, leaving our engineers with a full 12 hour window to analyse and fix any failures before the next regression run. This has resulted in a significant productivity boost for our verification efforts."

VCS FGP technology uses existing multi-core and many-core x86 CPU platforms to accelerate simulation performance. FGP is native to VCS simulation engines, therefore no changes or disruption to the existing simulation flows is required. All existing VCS features such as save-restore, NLP, X-Propagation simulation, and Verdi debug with parallel FSDB continue to work as before with no changes necessary to the design or testbenches.

"We continue to extend our market leadership in simulation performance and innovate on our VCS FGP technology," said Ajay Singh, Vice President of engineering for the Synopsys Verification Group. "As our customers deploy VCS FGP in production, they achieve significant productivity and TAT gains with these performance innovations."