Analysis
Synopsys unveils 30 percent smaller area, low power USB 2.0 PHY IP for 28nm processes
Synopsys, Inc has announced the addition of the new DesignWare USB 2.0 picoPHY IP to its USB 2.0 PHY IP product line that has been successfully deployed in more than 300 customer designs, and in more than 50 different process technologies ranging from 180nm to 32nm. Targeted at mobile and high-volume consumer applications such as feature-rich smartphones, mobile internet devices and netbooks, the DesignWare USB 2.0 picoPHY supports advanced 28nm processes in a 1.8V architecture, is 30 percent smaller than the previous USB 2.0 PHY generation, and offers reduced pin count and low standby power consumption.
The “Delivery of USB IP solutions from providers like Synopsys helps system designers benefit from the latest functionality offered by USB technology,” said Jeff Ravencraft, president and chairman of the USB Implementers Forum. “With the prevalence of USB on mobile devices, IP solutions like Synopsys’ new DesignWare USB 2.0 picoPHY IP will enable designers to quickly incorporate this technology into their SoCs designs and bring new USB-enabled products to the market quickly.”
“For nearly a decade, designers have successfully incorporated Synopsys’ high quality DesignWare USB 2.0 PHY IP into their SoCs which they have shipped in hundreds of millions of units,” said John Koeter, vice president of marketing of the Solutions Group at Synopsys. “The addition of the new DesignWare USB 2.0 picoPHY IP to this already widely adopted product line provides designers with a competitive edge through our continued innovation and support for the latest processes and specifications.”