Analysis
Cortus and SST to Jointly Exhibit Low Power IP Solutions for System on Chip (SoC) Design at Embedded World 2012
Cortus S.A., and Silicon Storage Technology (SST), Inc. will be showing their low power IP products for embedded system on chip (SoC) designs at Embedded World 2012 in Nuremberg, Germany. The exhibit will combine Cortus’ silicon efficient, ultra low power 32 bit microcontroller cores with SST’s low power, ultra high endurance embedded flash non-volatile memory (NVM) technology.
TodaThe Embedded World 2012 exhibition runs from the 28th February to 1st March at the Exhibition Centre Nuremberg and is recognised as Europe’s largest industry event for embedded systems. Cortus S.A. and SST will be exhibiting at Embedded World and will be located at Stand 143 in Hall 5.
Cortus offers high performance 32-bit processor cores designed specifically for embedded systems. The APS3 features a tiny silicon footprint (same size as an 8051), very low power consumption, high code density and high performance (up to 1.67 DMIPS/MHz). The ecosystem around the Cortus processors includes a full development environment (for C and C++), commonly used peripherals, bus bridges to ensure easy interfacing to other IP and system support and functions such as cache and memory management units. The APS3 processor core is currently in volume production in a range of products from security applications to ultra low power wireless designs.
SST Superflash memory technology is the most widely licensed flash NVM technology today, and is commonly used in microcontrollers and automotive and smartcard devices. In 2010 alone, over four billion devices worldwide were manufactured using this technology.