Alphawave joins UALink

With the emergence of accelerated compute infrastructure to enable AI workloads spanning compute, training and inference, new purpose-built scale-up networks are required to scale data centre infrastructure to meet the specialised compute demands that general-purpose systems are falling short to meet.

UALink is an open industry standardised fabric interconnect for accelerator-to-accelerator communication designed to deliver low-latency and high-bandwidth interface to meet the needs of scale-up AI infrastructure, facilitating the coherency of operations between large nodes of AI accelerators.

The interface pools up to 1,024 XPUs into a single node with a latency of less than 100 ns pin-to-pin and supports data transfer at up to 224 Gbps per lane. By optimising the data and transaction layers, UALink significantly reduces die area, power and overhead compared to other solutions.

The Consortium membership unites expertise from hyperscalers, system OEMs, accelerator and switch developers. Having joined the Consortium, Alphawave Semi plans on bringing its expertise in connectivity subsystems and chiplets. The UALink Consortium was incorporated in October 2024 by a coalition of leading AI technology companies, including AMD, Amazon Web Services, Cisco, Google, HPE, Intel, Meta and Microsoft.

"Alphawave Semi is at the forefront of connectivity for AI and HPC, and by working with the UALink Consortium we will deliver our industry leading performance in connectivity solutions for timely, practical solutions to our customers to form the backbone of AI infrastructure," commented Letizia Giuliano, VP of IP Product Marketing, Alphawave Semi.

The UALink 1.0 specification will be available in Q1 2025.