Avago Technologies Stresses IGBT Protection in New Isolated Gate Drivers
Avago Technologies (Nasdaq: AVGO), a leading supplier of analog interface components for communications, industrial and consumer applications, today announced the 2.5 A peak-output drive ACPL-H342 and ACPL-K342 optically isolated IGBT gate drivers that feature a built-in Miller clamp, Rail-to-Rail output voltage, under-voltage lockout (UVLO) circuitry and protection against IGBT cross-conduction and current “shoot-through” for safe and efficient power inverter and motor control applications.
Designers have begun to look at the total cost of ownership of their power converter and motor drive systems. This includes things such as potential maintenance and field repair costs. System designers now demand isolated gate drivers with integrated features like Active Miller clamp and Rail-to-Rail output for reliable IGBT and power MOSFET operation and protection, especially important in motor drives and renewable energy inverters where downtime cannot be tolerated and field repairs are very costly.
IGBT Protection and Efficiency
A Miller clamp allows the control of the Miller current during high dV/dt output transition. It can also eliminate the need for a negative power supply to ensure safe IGBT turn off by quickly discharging the IGBT’s large gate capacitance to a low level without affecting the IGBT turn-off characteristics.
In addition, Avago’s new gate drive optocouplers feature an industry-best, common-mode transient immunity of 40 kV/µs at a 1.5 kV common mode voltage for reliable operation in noisy environments.
The UVLO function causes the output to be clamped whenever there is insufficient power supply voltage for safe operation. The under-voltage lockout protection circuitry ensures that there is sufficient gate drive voltage to switch the IGBTs completely on, therefore minimizing IGBT power dissipation. Once the supply voltage exceeds the positive-going UVLO threshold, the UVLO clamp is released, allowing the device output to turn on in response to an input signal.
Efficiency has been a key design goal of the new ACPL-H342 and ACPL-K342 gate drives. Their rail-to-rail output voltage swing and the low output dead time, made possible by low propagation time, minimize driver dissipation and increase efficiency.
Propagation delay is specified to prevent cross conduction of the IGBTs in the high- and low-side half-bridge IGBT configuration that is commonly used in power inverters. Propagation delay difference (tphl - tplh) between two devices is -10 ns minimum to -200 ns maximum. Hence, shoot through is prevented, thus eliminating a major condition that can cause IGBT damage and shorten operating life.
ACPL-H342 and ACPL-K342 Gate Driver Key Features
• Built-in IGBT protection
– Active Miller clamp
– UVLO with hysteresis
– No cross conduction between parts: tphl - tplh < 0 guarantee
• High peak output drive current: 2.0 A minimum, 2.5 A maximum
• 15 to 30 V supply voltage operation with rail-to-rail output drive
• High maximum working insulation voltage per IEC/EN/DIN EN 60747-5-5
– ACPL-H342-x60: 891 Vpeak
– ACPL-K342-x60: 1140 Vpeak
• High momentary withstand voltage per UL 1577
– ACPL-H342: 3750 Vrms for 1 minute
– ACPL-K342: 5000 Vrms for 1 minute
• High common-mode transient immunity: 40 kV/µs at 1.5 kV common mode voltage
• Fast propagation delay reduces dead time and increases system efficiency
• 8-lead SSO-8 package (stretched SO-8) is 40% smaller than 8-pin DIP