Micros

New microcontroller solutions in safety-critical applications

22nd February 2019
Lanna Deamer
0

In order to provide more flexibility in how to use safety microcontrollers in automotive and industrial applications, Infineon has cooperated with Xilinx and Xylon. At Embedded World, they will present a new Xylon IP core called logiHSSL. It enables communication between Infineon’s AURIX TC2xx and TC3xx microcontrollers and Xilinx’ SoC, MPSoC and FPGA devices via the Infineon High Speed Serial Link. This supports baudrates of up to 320 Mbaud at a net payload data-rate of up to 84%.

The HSSL is an Infineon native interface, low cost in regards to pin-count as it requires only five pins - two LVDS with two pins each and one clk pin.

So far, the HSSL interface is used to exchange data between AURIX devices and customer ASICs for performance or functional extension.

Now, the new IP core will allow system developers to combine safety and security provided by AURIX with the wide range of functional possibilities brought to the table by the Xilinx devices. Linked devices can access and control each other’s internal and connected resources through the HSSL.

“Our AURIX microcontrollers are the market reference for many safety-critical applications, for example in advanced driver assistance and automated driving,” said Ralf Koedel, Marketing Director Microcontrollers at Infineon.

“Now, we are creating new options for our customers in emerging applications that are both performance-hungry and safety-critical. Besides the ones mentioned these include for example industrial automation applications.”

“Our products are adopted in ADAS and AD architectures for data aggregation, pre-processing, and distribution as well as compute acceleration,” said Paul Zoratti, director Automotive Solutions, Xilinx.

“Coupled with the AURIX family providing ASIL D level functional safety, this has created a strong market pull for an FPGA-based HSSL solution. Xylon’s licensable IP core will enable customers to implement a reliable HSSL communications path between Xilinx and Infineon devices without expending valuable development resources.”

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