Addressing the needs of enterprise systems with production-ready PHY IP
Using its 14nm Power Plus (LPP) process, Rambus has announced that it has developed an R+ DDR4 PHY on the GLOBALFOUNDRIES 14-FX ASIC platform.
As part of a suite of memory and SerDes interface offerings for networking and data centre applications, Rambus has achieved a production-ready 3,200Mbps DDR4 PHY on GLOBALFOUNDRIES power performance optimised 14nm LPP process. The R+ DDR4 PHY is designed to meet the performance and capacity demands of the next wave of data centre and networking markets.
“As we become more reliant on the cloud and the stresses placed on data centres continues to grow, the need for memory offerings that promise faster speeds and higher bandwidth has never been more important,” said Luc Seraphin, Senior Vice President and General Manager of the Rambus Memory and Interfaces division. “Together with GLOBALFOUNDRIES, we have been able to develop the industry’s first DDR4 PHY on a 14nm LPP process running at 3,200Mbps and capable of achieving the performance requirements of next generation systems.”
“GLOBALFOUNDRIES’ FX-14 platform, based on our advanced 14nm LPP technology, is designed to support the memory intensive computing tasks in today’s most demanding enterprise applications,” said Kevin O’Buckley, Vice President Product Development GLOBALFOUNDRIES. “At 3,200Mbps, the R+DDR4/3 PHY delivers the maximum data rate supported by the standard enabling advanced functionality like simultaneous streaming of Ultra HD content. We look forward to continue collaborating with Rambus as we develop a fully featured suite of memory products designed to ensure the best performance for today’s data centres.”
The Rambus R+ DDR4 PHY is DFI 4.0 compatible, providing integration and enabling customers to differentiate their offerings by providing performance while maintaining full compatibility with industry standard DDR4 and DDR3/3L/3U interfaces. Designed for flexibility, the R+ DDR4 PHY delivers data rates from 800 to 3,200Mbps in multiple memory sub-system options including die down, DIMM and 3DS. In addition, the PHY supports 16-72bit interfaces, along with single and multi-rank configurations, allowing the end customer to optimise their design for performance, as well as both area and low power.