PCIM Europe digital days award-winning presentations

The engineers will hold their award-winning presentations online during the ‘PCIM Europe digital days’ from 7th to 8th July 2020. Moreover, attendees are invited to chats and exchange ideas with the over 250 speakers from industry and academia. The speakers will be available in live discussions following each session.

The virtual event will offer further interaction opportunities for the power electronics community, such as an interest-based matchmaking for all participants and a connection model in the form of business speed-dating sessions with randomly assigned persons based on their own profile and interests. A virtual Early Bird Café and a concluding get-together offer an additional possibility to network in a relaxed digital environment.

The free registration as well as the detailed program for this two-day event with over 270 poster and oral presentations, keynotes and special sessions on latest developments and trends in power electronics is available at pcim-europe.com.

The winner of the PCIM Europe Best Paper Award is:

So Tanaka, AIST, Japan
SiC Module Operational at 200°C with High Power-Cycling Capability Using Fatigue-Free Chip Surface Packaging Technologies.

The winners of the PCIM Europe Young Engineer Awards are:

Patrick Hofstetter, University of Bayreuth, Germany
Parasitic Turn-On of SiC MOSFETs - Turning a Bug into a Feature

Kirill Klein, Fraunhofer Institute IZM, Germany
Low Inductive Full Ceramic SiC Power Module for High-Temperature Automotive Applications

Francesco Porpora, University of Cassino and Southern Lazio, Italy
Performance Analysis of Active and Passive Equalizer Circuits for Lithium-Ion Cells

PCIM Europe 2020 Best Paper Abstract:

SiC Module Operational at 200 °C with High Power-Cycling Capability Using Fatigue-Free Chip Surface Packaging Technologies
So Tanaka, Hiroshi Notsu, Hisato Michikoshi, Jiro Shinkai, Hiroshi Sato, Kunihiro Sakamoto, AIST, J; Yasuki Mikamura, Sumitomo Electric Industries, J

This study demonstrates a successful SiC module operation after conducting a power-cycle test of over 320,000 cycles at junction temperature (Tjmax) of 200°C. This lifetime is one order of magnitude longer than a development target for automotive application. This study focused on three chip top structures: a ‘thermal expansion coefficient (CTE) matching layer’ made of an Fe-Ni ‘Invar’ alloy with a CTE value close to that of SiC, a sintered copper joint and a copper wire for high temperature and high current durability improvement.

PCIM Europe 2020 Young Engineer Award Abstracts:

Parasitic Turn-On of SiC MOSFETs - Turning a Bug into a Feature
Patrick Hofstetter, Robert W. Maier, Mark-M. Bakran, University of Bayreuth, D

This paper shows, that the unwanted parasitic turn-on (PTO) in SiC MOSFETs does not always need to be of a disadvantage. It is shown that a small PTO can even be used to lower the maximum overvoltage at the body diode during the diode turn-off. In applications where this is the limiting condition for the switching speed, this means that the SiC MOSFET turn-on can be accelerated leading to immensely lower losses.

Low Inductive Full Ceramic SiC Power Module for HighTemperature Automotive Applications
Kirill Klein, Olaf Rämer, Eckart Hoene, Fraunhofer Institute IZM, D; Yusuke Yasuda, Hitachi Metals Europe, D; Hiroyuki Ito, Fumi Kurita, Masato Enoki, Hideyuki Nakamura, Kenji Okishiro, Hitachi Metals, J

This paper presents a new power module technology suitable for automotive high power and high temperature applications. SiC MOSFETs are sintered into to the LTCC substrate cavity from top side and soldered to SiN-AMB from bottom side. Primary DC link RCsnubber, driver booster and high current contacts are soldered on ceramic stack. Base plate free water cooling concept using ultra-short thermal path with 3D printed heat sink allows to fullfil thermal requirements for 150kW power.

Performance Analysis of Active and Passive Equalizer Circuits for Lithium-Ion Cells
Francesco Porpora, Umberto Abronzini, Mauro Di Monaco, Vito Nardi, Giuseppe Tomasso, University of Cassino and Southern Lazio, I; Ciro Attaianese, University of Naples Federico II, I; Matilde D’Arpino, The Ohio State University, USA

This paper proposes the performance analysis of two different architectures for passive and active Battery Management System (BMS). The comparison has been performed in terms of equalization speed, power losses, complexity of both hardware and software implementation, size and cost. Numerical and experimental analyses have been performed to validate the performance of each equalizer circuit in charging, discharging and idle state.