Synopsys' StarRC Extraction Solution Enables More Than 150 Successful 28nm Tapeouts

StarRC is already used by more than 40 semiconductor companies for 28-nm design signoff, confirming its position as the industry's gold standard extraction solution through several generations of process technologies.

Companies that have qualified and selected the StarRC solution for use in their 28-nm signoff and tapeout flows include Altera Corporation, Bull, Fujitsu Semiconductor, HiSilicon Technologies, Imagination Technologies, LSI Corporation, Moortec Semiconductor, NVIDIA, Qualcomm Incorporated, Renesas Electronics Corporation, Samsung, STMicroelectronics, Toshiba and others.
Delivering an extraction solution that enables our customers to achieve their aggressive signoff goals with confidence is a critical priority at each new process node, said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. Crossing the 150-tapeout milestone at 28 nanometers is a strong validation of StarRC's strengths and our continued collaboration with foundries. It is also an excellent testimony to the broad range of customer designs benefitting from its capabilities.

About StarRC
StarRC is a key component of Synopsys' Galaxy™ Implementation Platform and the leading parasitic extraction solution for system-on-chip (SoC), custom digital, analog/ mixed-signal (AMS) and memory designs. StarRC's 28-nm features include advanced modeling for new interconnect and device parasitic effects. These capabilities were developed and validated in close collaboration with major silicon foundries and other leading-edge customers, helping to ensure the best model-to-silicon correlation. To improve productivity, StarRC also offers unified Rapid3D fast field solver, enhanced multicore technology with adaptive extraction algorithms and proprietary reduction capabilities for faster extraction, and the smallest netlist to sign-off for the largest 28-nm SoC designs.