nepes picks Siemens to meet 3D IC package challenges

nepes is committed to providing us with the most comprehensive portfolio of semiconductor packaging design and manufacturing services, to help us innovate and succeed in a market where high performance and compact form factors are critical.” said Brad Seo, vice president of SAPEON Korea’s R&D centre. “By expanding nepes’ adoption and usage of Siemens’ EDA technologies for advanced packaging, we also can achieve the innovative technologies necessary to grow.”   nepes provides packaging, testing, and semiconductor assembly services for clients throughout the global electronics industry.

The company also offers packaging design services including wafer level packaging, fan-out wafer level packages, and panel level packaging.  

Building on this foundation, nepes is now driving additional packaging innovation with a broad range of advanced technologies from Siemens EDA, including the Calibre nmPlatform tool, HyperLynx software for electrical rule checking, Calibre 3DSTACK software, as well as Siemens’ industry-leading Xpedition Substrate Integrator software and  Xpedition Package Designer software.

Together, these Siemens technologies helped nepes provide fast and reliable design services including 2.5D/3D-based chiplet designs for the company’s growing base of global IC customers. 

“Siemens is committed to delivering industry-leading semiconductor packaging technologies to supply chain partners such as nepes, which helps enable them to achieve their digitalization goals,” said AJ Incorvaia, senior vice president of Electronic Board Systems at Siemens Digital Industries Software.