IP subsystem accelerates data fusion processing in IoT devices

An integrated microDMA controller minimises system-level energy consumption by enabling data transfers while the processor is in one of several programmable sleep modes. The integrated peripherals, memories, hardware accelerators and software DSP functions deliver the performance efficiency needed for common processing tasks in IoT applications such as always-on sensor fusion, voice and image detection and audio playback.

Tadaaki Yamauchi, Vice President, Core Technology Business Division, Renesas Electronics, commented: "IoT edge devices increasingly require a combination of low-power sensing capabilities and high-performance processing. Through our collaborative demonstration platform, utilising cutting-edge 40nm embedded flash technology, Renesas and Synopsys show how designers can leverage complementary technologies such as Synopsys' DesignWare Smart Data Fusion IP Subsystem with Renesas' innovative, high-speed embedded flash memory controller IP to develop high-performance, cost-optimised IoT systems in less time."

The DesignWare Smart Data Fusion IP Subsystem is designed to process data from numerous digital and analog sensors with minimal power consumption, offloading the host processor and enabling more efficient processing of sensor data. The fully configurable IP subsystem includes an ARC EM5D, EM7D, EM9D or EM11D processor. This family of power-efficient cores combines RISC and DSP processing and includes support for XY memory banks to enable a sustained throughput of one 32x32 MAC operation (or two 16x16 MAC operations) per clock cycle. The additional signal processing bandwidth is optimised to manage the extensive data processing required by advanced sensor fusion algorithms and to improve processing efficiency for a range of audio formats including MP3, SBC, OPUS and AAC LC. For example, executing codecs such as Bluetooth Low Complexity Subband Coding (SBC) with ARC processors requires less than 40μW of power in 40nm low-power processes with frequency requirements more than 25% lower than competitive processor offerings.

The subsystem's integrated microDMA controller enables memory and peripheral access during processor sleep modes and provides four times faster access times compared to traditional bus-based DMA implementations. In addition, the subsystem incorporates highly-optimised I/O peripherals including multiple SPI, I²C and ADC interfaces, further lowering gate count and energy consumption while reducing engineering effort.

To ease software development, the subsystem includes software drivers and a rich library of off-the-shelf DSP functions supporting filtering, correlation, matrix/vector, decimation/interpolation and complex math operations. Designers can implement these sensor-specific DSP functions in hardware using a combination of native DSP processor instructions and tightly coupled hardware accelerators to boost performance efficiency and reduce power consumption. The subsystem is supported by commercially available software covering a range of IoT functionality, including speech recognition, voice control, motion sensing and audio post-processing and playback. Additionally, Synopsys' embARC Open Software Platform gives software developers online access to a comprehensive suite of free and open-source software that accelerates code development for the subsystem.

John Koeter, Vice President, Marketing, IP and prototyping, Synopsys, commented: "Advanced sensor fusion applications require a high level of integration with minimal power consumption and area. The new DesignWare Smart Data Fusion IP Subsystem gives designers a pre-verified hardware/software solution that delivers the additional DSP performance needed to manage specialised tasks like processing sensor information, recognising voices and audio playback, while meeting the system's power budget. By delivering a complete, pre-integrated IP subsystem, we enable designers to quickly incorporate this key functionality into their IoT devices with significantly less risk and effort."

The DesignWare Smart Data Fusion IP Subsystem will be available in February 2016.