Industry's first SuperSpeed USB Inter-chip interoperability

With this successful demonstration, the companies validate the quality and interoperability of Synopsys' DesignWare USB 3.0 IP for SSIC, giving system-on-chip designers confidence in the reliability of their designs that utilize the IP.

"The SSIC specification leverages the low-power capabilities of the MIPI M-PHY while maintaining the high performance of USB 3.0 software and hardware," said Jeff Ravencraft, USB-IF President and COO. "When implementing SSIC functionality, which incorporates USB 3.0 controller IP and a MIPI M-PHY, designers can reuse their existing software drivers and benefit from their familiarity with the USB standard. Successful interoperability demonstrations from IP vendors like Synopsys help drive the evolution of USB and SSIC technology."

As consumers demand longer battery life for their mobile and wireless products, system architects are increasingly looking to new standard interfaces such as SSIC to reduce power consumption. The SSIC standard reduces chip-to-chip power consumption by up to 80 percent over conventional USB 3.0 technology for power-sensitive applications.

"With more than 3,000 USB IP design wins, Synopsys is focused on collaboration with key companies such as Intel to ensure that our IP is interoperable and functions as expected," said John Koeter, vice president of marketing for IP and systems at Synopsys. "Electronic product consumers continue to demand more functionality and longer battery life. DesignWare USB 3.0 IP for SSIC enables system architects building mobile and wireless connectivity devices to maximize power savings in their SoCs and end products."

The DesignWare USB 3.0 IP for SSIC is available now.