IC Compiler update boosts quality-of-results

This latest production release raises the bar on achievable QoR through the deployment of new technologies, including congestion-driven restructuring, power-aware concurrent-clock-and-data optimisations, advanced full-flow power optimisation and improvements in route-guided design closure. The combination of these capabilities delivers up to 15% area, timing and power improvements, enabling the highest levels in performance. With this release of IC Compiler II, Synopsys continues to strengthen its deployment momentum across the broad design community.

The IC Compiler II 16.03 release offers new and powerful technologies enabling superior QoR for complex SoCs while accelerating design closure to meet today's tight time-to-market needs. New QoR-focused optimisation technologies include total slack-focused placement and local skew-based clock tree synthesis, which offer significant timing, area and power benefits for all advanced designs. Additionally, specialised techniques such as congestion-driven logic restructuring improve routability and provide additional power savings for datapath-intensive designs.  Runtime has been improved in many areas, including 40% faster multi-level physical hierarchy capability, enabling designers to seamlessly navigate and manipulate ultra-large chips and blocks to achieve faster closure.

Signoff correlation and design convergence has been enhanced with new features including route-guided optimisation and PrimeTime delay calculation within IC Compiler II. For designs at 10nm and below, the IC Compiler II infrastructure continues to add features including support for lithography-aware placement constraints, fully colour-aware routing, as well as advanced timing and extraction modelling. These features are natively captured throughout the infrastructure, enabling a highly convergent physical-design solution capable of achieving high QoR with low runtime.

Antun Domic, Executive Vice President and General Manager, Design Group, Synopsys, commented: "Partners like HiSilicon and Movidius have always been at the forefront of innovation. Their selection of IC Compiler II for performance-critical designs further attests to how the industry-leading QoR IC Compiler II delivers is helping performance-driven customers differentiate themselves. With several key innovative technologies, the latest release of IC Compiler II will further extend these benefits to the larger physical design community designing across both established and emerging nodes."