EnSilica and Altera deliver successful RRH design

EnSilica were responsible for design and verification tasks within the RRH processing chain along with the integration and verification of the top level design, followed by timing closure & fitting. Altera also provided CPRI IP, customised for the specific application and extensive use was made of the Altera DSP Builder tools to generate timing-optimised register transfer level (RTL) code.

The project was divided into a number of phases, ending with the delivery of a timing closed/functionally verified production device ready for HW integration and SW testing. On-time delivery was a paramount requirement to ensure the testing team were kept fully utilised and the delivery commitments to the end customer were met.

EnSilica succeeded in meeting all delivery dates for the project.

This was a great example of how the combination of EnSilica’s high quality design services offering and Altera technology and IP can deliver the best possible solution for our customers. For some customers adopting leading-edge FPGA technologies can be daunting, but with EnSilica engaged, customers can be totally confident that the development is in safe hands and they will have a production ready device in the shortest possible time. This is good for the customer and good for Altera.

EnSilica are a member of the Altera Design Services network, bringing together companies with the experience and expertise to enable Altera’s customers achieve their challenging product development needs – lowering risk and accelerating time to market.