Ultra-low-power sensor IP subsystem from Synopsys

Offering designers a complete and pre-verified solution, the DesignWare Sensor IP Subsystem meets the requirements of a broad range of applications such as sensor hubs, smart sensors and sensor fusion. With applications such as the IoT, automobiles and mobile devices relying increasingly on the ability to read and interpret environmental conditions (pressure, temperature, motion, proximity, etc.), sensors are becoming universal. Pre-integrating sensor-specific IP blocks with an efficient processor and software in a single subsystem, the DesignWare Sensor IP Subsystem gives designers a SoC-ready sensor solution. This can lead to a substantial reduction in design and integration effort and design risk, while accelerating time-to-market.

"The total number of sensor units is estimated to grow from just under 10 billion in 2012 to nearly 30 billion in 2017. As more semiconductor suppliers integrate sensor interfaces into their SoCs, the use of sensor IP subsystems such as Synopsys' DesignWare Sensor IP Subsystem will significantly reduce their integration effort and cost," comments Tony Massimini, chief of technology at Semico Research.

Integrated Hardware

Incorporated into the subsystem is the power- and area-efficient DesignWare ARC EM4 32-bit processor core, which includes custom extensions and instructions supporting application-specific hardware accelerators and tightly integrated peripherals. The DesignWare Sensor IP Subsystem includes multiple configurable GPIO, SPI and I2C digital interfaces for off-chip sensor connections. It also supports ARM AMBA AHB and APB protocol system interfaces to ease integration into the full SoC. The analog interfaces include low-power high-resolution ADCs that efficiently digitize sensor data for the processor. Enabling immediate software development, the subsystem's HAPS FPGA-based prototyping solution delivers a scalable platform for rapid full system integration and validation. SoC integration services are available to help customers integrate the subsystem into their chip or customize it to meet their unique application requirements.

Robert Fortin, director of sensors business unit at Allegro Microsystems, commented: “As the technology leader in magnetic sensor ICs for the automotive market, it is critical that Allegro acquires high-quality IP from a trusted provider such as Synopsys. Based on our experience, the DesignWare ARC 32-bit processor's combination of high performance, small area and low power provides key advantages for sensor design over alternative solutions."

Dedicated Software

A rich library of DSP functions (which includes mathematical, complex math, filtering, matrix/vector and decimation/interpolation), within the DesignWare Sensor IP Subsystem, help to accelerate sensor application code development. Easing integration of the I/O with the ARC EM4 processor and interface of the DesignWare Sensor IP Subsystem to the host processor, peripheral software drivers and host drivers are provided.

Sensor-specific software functions can be executed in hardware to boost performance efficiency and reduce memory footprint. In combination with sensor-specific architectural templates, an easy-to-use configuration tool allows designers to quickly select options such as the DSP functions and digital interfaces for their specific application. With this a complete sensor subsystem can be configured in hours, not weeks.

John Koeter, vice president of marketing for IP and systems at Synopsys, comments: "The industry is seeing significant proliferation of sensor-enabled devices in homes, cars and on-the-go. These devices require integrated sensor SoCs that deliver high performance, small area and low power consumption. Synopsys' pre-verified, SoC-ready sensor subsystem provides designers with a higher level of hardware and software IP integration, enabling them to achieve their design goals faster and with significantly less risk."

Availability

The DesignWare Sensor IP Subsystem is targeted for availability in October 2013 to early adopters, with general availability planned for Q4 2013.