Design platform certified for Samsung's 14LPP FinFET process

Ben Suh, Senior Vice President, Sales and Marketing, Samsung Foundry, commented: "This certification and reference flow for our 14LPP process was made possible through close collaboration between Samsung and Synopsys. Design engineers can confidently move their designs to volume production on our advanced FinFET-based process using the silicon-proven Galaxy Design Platform flow."

Key Synopsys tools and features of this Galaxy Design Platform reference flow, certified using the ARM Cortex-A53 processor, include:

• Design Compiler Graphical synthesis: Correlation, congestion reduction and physical guidance for IC Compiler II place and route system;
• DFTMAX and TetraMAX test solution: FinFET-based, cell-aware testing and slack-based transition delay for better yield;
• Formality formal verification: UPF-based equivalence checking with state transition verification;
• IC Compiler II place and route: Double-patterning aware physical implementation featuring advanced design planning for optimised module placement and timing;
• IC Validator signoff physical verification: In-Design, automated DRC repair, pattern matching and metal fill within IC Compiler II, as well as LVS signoff;
• PrimeTime timing signoff solution: Ultra-low voltage timing signoff with AWP, variation-aware analysis and placement rule-aware engineering change order guidance;
• StarRC extraction solution: Double-patterning, full colour-aware variation and 3D FinFET modelling; and
• PrimeRail reliability analysis: Rail analysis for electromigration and IR-drop integrity.

"Our collaboration with Samsung is focused on enabling designers to get the optimum QoR with highest confidence on the latest 14LPP FinFET process. Together, Samsung Foundry and Synopsys continue to ensure that engineers can implement their most advanced designs and bring them to market with a predictable schedule," added Bijan Kiani, Vice President, Product Marketing, Design Group, Synopsys.

The 14LPP reference flow is compatible with the Synopsys Lynx Design System, a full-chip design environment that includes innovative automation and reporting capabilities to help designers implement and monitor their designs. It includes a production RTL-to-GDSII flow that simplifies and automates many critical implementation and validation tasks, enabling engineers to focus on achieving performance and design goals.

The Galaxy Design Platform reference flow for Samsung Foundry's 14LPP and 28LPP processes are available for download from Samsung Foundry.