Design optimisation for next-gen high-performance computing

RedHawk Analysis Fusion enables place-and-route engineers to perform early power grid integrity checks, as well as static and dynamic power analysis at multiple points in the design flow and from within the familiar IC Compiler II cockpit.

Productivity gains are maximised by collapsing numerous steps associated with point tool flows into a single command. Seamless visualisation of IR drop maps from within the IC Compiler II environment also means faster issue debug, which reduces ECO cycle time.

Designers can expect true convergence without unexpected violations during final power signoff analysis, because the underlying results are generated by the same ANSYS RedHawk power analysis engine.

"With our close partnership and collaboration with ANSYS, we were able to successfully roll out our RedHawk Analysis Fusion capability on schedule. Designers can immediately leverage the design optimisation benefits of IC Compiler II with embedded industry standard ANSYS RedHawk rail analysis," said Michael Jackson, corporate vice president of marketing for the Design Group at Synopsys.

"Our customers are especially pleased with the productivity gains achieved by utilising a single environment that provides seamless execution and visualisation of RedHawk analyses coupled with IC Compiler II automated optimisation and repair."

"RedHawk Analysis Fusion complements ANSYS' industry-standard power integrity and reliability analyses, and enables designers to unlock better PPA," said John Lee, vice president and general manager at ANSYS. "This partnership empowers new innovations, and we are thrilled with the results customers are already seeing."

Synopsys will feature Toshiba Electronic Devices & Storage Corp. as one of the speakers at the Fusion Technology lunch panel at the Synopsys Users Group (SNUG) Silicon Valley event, March 21-22 at the Santa Clara Convention Center, to discuss their experience and benefits derived from using RedHawk Analysis Fusion.