Design and verification tools enable successful tape-outs

In addition, the collaboration has delivered QuickStart Implementation Kits (QIKs) that take advantage of the latest features in the Synopsys Design Platform to enable designers to more quickly achieve their target IC power, performance and area with the new ARM CPUs using ARM Artisan standard cells, memories and ARM POP IP.

"The changing nature of compute requires designing SoCs to enable distributed intelligence that optimally balances compute efficiently from edge to cloud," said Nandan Nayampally, General Manager, Compute Products Group, ARM. "Our early collaboration with Synopsys on design tools for the first Cortex-A processors with DynamIQ technology and the Mali-G72, has enabled our mutual partners to take advantage of the latest features from the Synopsys Design and Verification Platforms to achieve the performance, power and area required for devices to deliver extremely responsive and increasingly human-like experience."

To enable early adopters of ARM's new CPU IP to achieve excellent PPA results, Synopsys and ARM collaborated to develop QuickStart Implementation Kits (QIKs) for the high-performance Cortex-A75 and the high-efficiency Cortex-A55, which include the DynamIQ Shared Unit (DSU), to enable a new single-cluster design with new capabilities and more flexibility for multi-core processing. Each QIK includes a Reference Implementation (floorplan and optimised scripts) and a reference guide and takes advantage of key features of the Synopsys Design Platform, including:

• Synopsys physical guidance (SPG), automatic placement pre-clustering, automatic path groups and tuning in Design Compiler Graphical and IC Compiler II solutions
• Layer promotion for critical nets in Design Compiler Graphical enabling focused optimisation on the right nets, early in the design process
• Concurrent clock & data (CCD) optimisation in IC Compiler II with a new solver-based multi-objective engine capable of trading off timing, area and power with minimum impact on run time
• Parametric On-chip Variation analysis throughout the flow, including signoff with PrimeTime timing analysis, to enable ultra-low voltage designs
• Multi-corner multi-mode analysis enabled throughout the flow

Early adopters of ARM's new IP have also taken advantage of Synopsys' Verification Continuum Platform, including:

• Synopsys Virtualizer Development Kit (VDK) Family for ARM processors, including the ARM Fast Models for Cortex-A75 and Cortex-A55 processors
• Synopsys' ZeBu emulation and HAPS prototypes for Cortex-A75, Cortex-A55 and Mali-G72 processors
• Synopsys VC Verification IP (VIP) for the ARM AMBA 5 protocol provides support for the ARM CoreLink CMN-600 and DMC-620 cores and includes system level test-suites, a system monitor, protocol-aware debug and performance measurement capabilities

Synopsys design consultants have assisted hundreds of companies with their ARM-based designs. To help designers take advantage of the new ARM processors and efficiently achieve their desired performance, power and area (PPA) targets, Synopsys offers a range of design services from a four week QuickStart Implementation Service, through consultative core-optimisation to full turnkey core hardening.

"Working together for more than 20 years, Synopsys and ARM develop optimised design and verification solutions to enable mutual customer success when ARM IP products are released," said Deirdre Hanford, Executive Vice President and Co-general Manager, Synopsys Design Group. "Our collaboration on ARM's new Cortex-A75, Cortex-A55 and Mali-G72 processors enables our mutual customers to take advantage of innovative and stand-out features delivered by the tools in the Synopsys Design Platform and Verification Continuum Platform to achieve industry-leading PPA targets for their premium ARM-based designs."