Collaboration demonstrates full system interoperability

The demonstration shows full initialisation of the PCI Express 4.0 interface including link up, configuration and enumeration at 16GT/s. In addition, the two companies used the lane margining functionality between the host and device to assess the link quality for a more robust design. The demonstration will be presented at the PCI-SIG Developers Conference 2017 in Synopsys' booth 2.

Synopsys and Mellanox have a long history of collaboration to drive development of the PCI Express 4.0 specification for the benefit of the industry. Both companies contributed the PHY characterisation data to validate the electrical requirements of the PCI Express 4.0 specification at 16GT/s. The companies began demonstrating PCI Express 4.0 PHY electrical interoperability in 2015 and are now demonstrating full system interoperability for the PCI Express 4.0 specification at 16GT/s.

"We achieved another milestone in our collaboration with Synopsys as both companies continue to demonstrate PCI Express technology leadership," said Gilad Shainer, Vice President of marketing at Mellanox Technologies. "The successful interoperability displays the robustness of both solutions, and our mutual support of the PCI Express 4.0 specification to meet the connectivity requirements of hyperscale, cloud, high-performance computing, machine learning, storage, media and more applications."

"As the leading provider of PCI Express IP, Synopsys invests heavily in interoperability testing to ensure that our IP is robust and performs as expected in real-world environments," said John Koeter, Vice President of marketing for IP at Synopsys. "Our collaboration with Mellanox demonstrates how both companies are helping designers accelerate the integration of the PCI Express 4.0 interface into their high-performance cloud computing designs."