Assisting custom design and IP productivity

31st March 2016

Synopsys Inc

Joe Bush

0 0

Datasheet

The recently released Custom Compiler solution from Synopsys has been deployed at STMicroelectronics for custom design, initially starting with 28nm FD-SOI IP development. After an extensive evaluation and qualification for custom design and layout, Custom Compiler is being used for production work from schematic entry through custom layout at ST sites in France and India.

“ST has adopted Custom Compiler for 28nm FD-SOI standard cell and memory layout,” said Cyril Colin-Madan, Design Platform director at STMicroelectronics. “We evaluated the tool across a number of metrics to ensure it meets our requirements and a key factor in our decision to adopt it was the improvement in productivity. Custom Compiler’s Template Assistants make it easy to apply previous layout decisions to new designs, which helps us shorten layout tasks from days to hours for a typical cell.”

Custom Compiler Template Assistants let designers store and reuse custom design templates. A template lets designers save useful placement or routing patterns and apply them to new designs. Synopsys has been using this approach for its own IP development to shorten custom layout tasks. Now with Custom Compiler, Template Assistants are also available to Synopsys customers.

“ST was a key partner during the development of Custom Compiler,” said Antun Domic, Executive Vice President and General Manager at Synopsys. “They helped refine and validate the complete custom flow in Custom Compiler and gave great feedback to make Custom Compiler easy to deploy for large multi-national teams. We are working in close collaboration with ST to deploy Custom Compiler to their IP design community.”