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ASIP design tools reduce KYOCERA's project schedule by nine months

9th November 2014

Synopsys Inc

Nat Bowers

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KYOCERA Document Solutions has accelerated the design of a high-performance DSP for their next-gen multi-function printer using Synopsys' ASIP (Application Specific Instruction-set Processor) design tools. By using tools that automate the design and optimisation of application-specific processors, KYOCERA was able to develop a custom DSP that delivers the high performance required for complex image-processing functions in less than a year, saving an estimated nine months on their overall project schedule. And, unlike fixed hardware, the resulting ASIP provides the programmability and flexibility to meet the needs of multi-function printer image processing functions.

Traditionally, each KYOCERA multi-functional printer model required the development of model-specific, fixed hardware SoCs to meet unique image processing algorithms and performance specifications. To improve development efficiency and lower TCO over the life of its next-gen printer products, KYOCERA required a more flexible and higher performance processor design with full programmability. After determining commercially available DSPs would not meet their performance goals, they selected Synopsys' ASIP design tools to develop their own custom processor.

The ASIP solution from Synopsys enabled KYOCERA to use a high-level specification and quickly model multiple processor architectures, profile performance and tune the architecture for their specific image processing application. Using this single input specification, Synopsys' tool automatically generated the software development kit containing the instruction-set simulator, assembler, linker, debugger and C compiler, as well as the synthesisable RTL design. This not only enabled early software development and debugging, it also saved KYOCERA an estimated three-quarters of the effort of creating the SDK and RTL design compared to a traditional manual approach. The combination of early SDK availability and automation of architecture exploration and design creation resulted in a significant reduction in KYOCERA's overall project schedule while producing a design optimised for their specific performance.

Michihiro Okada, General Manager, Software 3 R&D Division, Corporate Software Development Division, KYOCERA Document Solutions, comments: "Synopsys' reputation as an established provider of ASIP development tools and their multi-function printer design wins worldwide were key factors in our decision to use their ASIP design tools. Being able to use a single processor description to design highly efficient RTL as well as the associated software development kit - including an optimising C compiler - allowed us to focus on optimising our architecture throughout the entire design process."

"By replacing fixed hardware with ASIPs, companies can save significant development effort and achieve their aggressive project schedules. KYOCERA's successful custom DSP implementation highlights how Synopsys' ASIP tool technology enables designers to rapidly explore innovative processor architectures to achieve the best mix of programmability and performance, while greatly reducing their hardware and software development costs," adds John Koeter, Vice President, Marketing for IP and prototyping, Synopsys.