Achieve 20% faster signoff DRC performance

2nd September 2015

Synopsys Inc

Nat Bowers

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The latest release of the company's comprehensive physical verification signoff product, IC Validator 2015.06, has been introduced by Synopsys. The 2015.06 release focuses on refinements to the core engines to deliver a two times memory footprint reduction and 20% faster signoff design rule check performance on average. Twice as fast in many cases, IC Validator 2015.06 allows designers to extend the use of their current workstations and manage multiple concurrent jobs with greater ease.

IC Validator extends support for emerging process nodes and FinFET technology with new four-colour patterning decomposition and verification support. Certified signoff runsets at 28nm and below for all major foundries are available today.

IC Validator is the key technology enabler for In-Design physical verification in the IC Compiler and IC Compiler II place and route solutions. IC Validator In-Design in the 2015.06 release introduces timing- and density-aware track-based metal fill that offers higher density than foundry fill while maintaining pre-fill design timing. Additionally, In-Design automated DRC repair refinements now deliver a fix rate of greater than 80%, with many designs achieving fix rates of 100%.

Advances in process technology and ever-increasing design complexity have placed growing demand on physical verification products to check many more design rules. This evolution has created intense interest among IC designers in a new physical verification solution geared specifically to address these challenges. IC Validator is a comprehensive physical verification product including DRCs, layout-vs.-schematic checks, programmable extended electrical rule checking and metal fill insertion. IC Validator's modern architecture and excellent multi-core scalability make it the signoff tool of choice for a growing number of designers, from those developing small analogue chips to those designing the largest, most advanced digital chips.

Bijan Kiani, Vice President of Marketing, Synopsys' Design Group, commented: "We are committed to providing the best physical verification signoff solutions for our customers working with the leading foundries and at the latest emerging technology nodes. A growing number of leading customers are adopting IC Validator and realising the advantages of In-Design when tackling their growing physical verification challenges."