Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that it has signed an agreement with Realtek Semiconductor Corp., a leading IC design house in Taiwan, that establishes Cadence as Realtek's strategic electronic design automation (EDA) solutions provider.

Cadence today announced that STMicroelectronics, a global leader in integrated circuits for communications, consumer, computer, automotive and industrial applications, has standardised on Cadence QRC Extraction for their 40-nanometer custom/analog designs. A key component of the Cadence digital and analog/mixed signal design flow, QRC Extraction enables faster turnaround time, scalability through its multi-core backplane, increased accuracy to si...

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Innofidei Inc., a leading mobile chipset provider based in Beijing, China, has successfully taped out the industry’s first long-term evolution time division duplex (LTE-TDD, or TD-LTE) baseband chip supporting a bandwidth of 20MHz for the next-generation TD-CDMA wireless communications protocol. The TD-LTE design achieved first-pas...

Cadence Design Systems, Inc. (Nasdaq: CDNS), a leader in global electronics design innovation, today announced that it has successfully completed the acquisition of Denali Software, Inc., a Sunnyvale, Calif.-based provider of electronic design automation (EDA) software and intellectual property (IP).

Cadence introduced the Cadence SOI Design Hub, a new Web portal that lowers the barriers to adopting silicon-on-insulator (SOI) technology through comprehensive silicon-proven design enablement solutions and services. The SOI Design Hub is aimed at reducing SOI adoption start-up costs, cutting time to market for SOI intellectual property (IP), and improving design quality.

Cadence Design Systems and Denali Software, Inc., a leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that the companies have entered into a definitive merger agreement under which Cadence will acquire Denali for $315 million in cash. Denali is expected to have approximately $45 million in cash at closing. In alignment with its EDA360 strategy, this transaction expands Cadence’s solu...

Cadence Design Systems opened its annual CDNLive! EMEA user conference in Munich with a call to action for the semiconductor and EDA industries to join in embracing the EDA360 vision. Now in its fifth year, CDNLive! brings together Cadence® technology users, developers and industry experts to discuss design challenges and cost-effective solutions. More than 550 delegates from over 130 companies and universities attended the conference.

Cadence Design Systems today announced a joint development agreement with IBM to create high-performance integration-optimized IP that will help customers deliver leading-edge designs while reducing the risk and time associated with integrating complex SoC Designs.

Cadence Design Systems, Inc. (NASDAQ: CDNS), the global leader in EDA360, today announced the Cadence Open Integration Platform, a platform that significantly reduces SoC development costs, improves quality and accelerates production schedules.

Cadence Design Systems, the global leader in EDA360, today announced that VIA Technology’s microprocessor subsidiary, Centaur Technology, achieved significant quality and time-to-market benefits by using the Cadence® Virtuoso® Space-Based Router on its latest set of processors. Centaur used the Cadence router to help design its new 65-nanometer Nano 3000 Series processors, designed to bring enhanced digital media performance and lower power c...

Cadence Design Systems today laid out a new vision for the semiconductor industry, EDA360. In outlining an application-driven approach to system design and development, Cadence issued a challenge to the semiconductor and electronic design automation (EDA) communities to address the growing “profitability gap” that threatens the vitality of the electronics industry.

Cadence Design Systems announced the first fully integrated high-performance verification computing platform, called Palladium XP, that unifies simulation, acceleration and emulation into a single verification environment. Developed to support next-generation designs, the highly scalable Palladium XP verification computing platform lets design and verification teams bring up their hardware/software environment faster and produce better quality em...

Cadence Design Systems announced that it has contributed to the Accellera standards organization new technology that can help engineers conduct faster and more thorough functional verification on complex mixed-signal SoCs. Cadence donated a set of extensions to the wreal feature of the Verilog-AMS real numbered modeling capability. These Cadence extensions are designed to improve accuracy and offer better plug-and-play with analog models. Wreal e...

Cadence Design Systems, Inc. today announced that STMicroelectronics has selected Cadence OrCAD PSpice technology to provide simulation capabilities to its customers to evaluate the company’s analog and power IC’s.

Cadence Design Systems, Inc. inaugurates its 2010 series of worldwide technical conferences with CDNLive! EMEA (Europe, Middle East and Africa) taking place in Munich, Germany, from May 4 to May 6. It is the first of six worldwide user conferences to be held this year, followed by events in Japan, China, North America, Israel, and India. CDNLive! EMEA brings together hundreds of Cadence® technology users, developers and industry experts to excha...

ChipEstimate.com announced today that more than two dozen IP companies recently have joined or upgraded their memberships to the ChipEstimate.com chip planning and IP portal. New members joining at the Prime Plus partner level include True Circuits, Inc., Virage Logic and Xilinx. New members joining at the Prime partner level are Alvand Technologies, Boeing, ChipStart, Evatronix, HDL Design House, Imagination Technologies, National Semiconductor...

Cadence Design Systems today announced that Energy Micro, the energy friendly microcontroller company, deployed Cadence Low-Power Solution, to develop a highly power efficient ARM Cortex M3-based microcontroller that significantly saves battery life.

Cadence Design Systems announced that three additional universities will take on active roles in its academic network in Europe. The network promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence. The latest additions to the Cadence Academic Network are the CETTI/TU Bucharest, which will focus on PCB design; the KTH Stockholm, which will concentrate on wireles...

Cadence Design Systems announced that Chipsbank Microelectronics Co., Ltd., a leading fabless IC design company based in Shenzhen, China, has adopted the Cadence Incisive Xtreme III system to accelerate the RTL design process with a verification flow for its next-generation digital consumer and networking chips.

Cadence Design Systems has released Cadence Encounter Digital Implementation (EDI) System 9.1, a complete and integrated digital design, implementation, and verification environment for the development of large-scale, complex SoCs. The new and expanded suite of capabilities in EDI System 9.1 answers the industry call for improved designer productivity in developing advanced low power and mixed signal SoCs at leading-edge process nodes – such as...