Synopsys' IC Compiler II surpasses 100 production designs

Throughout its broad, real-world usage, IC Compiler II has consistently demonstrated a ten-fold improvement in throughput while achieving even higher Quality of Results (QoR). Industry leaders pursuing advanced applications have successfully deployed this new place and route system on IP blocks at the chip level, while others have completed multiple tapeouts. Many have even chosen to displace incumbent third-party solutions. Coming so soon after the launch in 2014, this level of successful deployment serves as a resounding endorsement of the game-changing nature of IC Compiler II.

Vishnu Yalala, Senior Director, IC Engineering, Cavium, commented: "Cavium is already reaping the benefits of IC Compiler II, through both completed tapeouts and others in flight. With data volumes increasing exponentially year-over-year, we see IC Compiler II as a truly exciting solution to help meet our ever-shrinking development schedules for our highly differentiated networking solutions across all process nodes. Given the very real benefits that we have seen since our early collaboration with Synopsys, we are aggressively deploying and standardising on IC Compiler II across our extensive development programme."

IC Compiler II is Synopsys' state-of-the-art, production-ready place and route system designed from the ground up to deliver the highest productivity and best QoR for designs across all process nodes. Architected around a modern, low-memory footprint and natively multi-threaded infrastructure, IC Compiler II is able to handle designs comprising more than 500m placeable instances hierarchically, and has proven capacity for over 10m instance block implementation. Comprised of an optimised, place and route-focused data model, coupled with an extensible library system offering unique, geographically separated development capabilities, IC Compiler II eases user adoption by utilising industry-standard input and output formats, as well as familiar interfaces and process technology files. Additionally, IC Compiler II brings industry-leading, ultra-high-capacity automated design planning, unique clock-building technology and patented global analytical optimisation that result in a highly convergent design implementation flow. Together, these technologies enable enhanced QoR across all key power, performance and area implementation metrics as well as accelerate that all important time-to-market goal. The culmination of numerous years of engineering innovation, these industry-first technologies enable IC Compiler II to deliver five times faster runtime along within half the memory footprint while requiring half the iterations required to achieve the same target QoR – ultimately resulting in a ten times boost in design throughput and designer productivity.

"IC Compiler II is a game-changing product, enabling a world of opportunities for our customers. During the course of the past year, we have seen broad and rapidly growing adoption across the industry, leading to a full pipeline of production designs across the process spectrum. We are continuing to work closely with customers and our foundry and ecosystem partners to broadly accelerate products to market with the power of ten times," added Antun Domic, Executive Vice President and General Manager, Synopsys.