Over 5,000 ASIC prototyping systems shipped

The HAPS FPGA-based prototyping systems are supported by the company’s ProtoCompiler design automation software, which is claimed to perform three times faster than traditional prototyping flows, allowing designers to generate a multi-FPGA design partition in minutes. Together, the prototyping systems and design automation software extend the synchronisation of system clocks, reset and unified configuration, enabling up to 288m gates to be supported. The HAPS systems and ProtoCompiler software allow the development of ASIC designs that scale from IP blocks to complete SoCs.

"For more than four years, we have consistently relied on Synopsys HAPS systems to help us efficiently integrate and verify IP and perform full system validation," said Jinhua Chen, FPGA Manager, PixelWorks. "Synopsys provides us the most complete hardware and software prototyping solution in the industry, enabling us to accelerate our design time and reduce schedule risk."

"Through every generation of HAPS FPGA-based prototyping systems, we have focused on addressing our customers' pain points in the areas of scalability, time to first prototype and performance," said John Koeter, Vice President of Marketing, IP and Prototyping, Synopsys. "This significant milestone demonstrates how our customers are benefiting from our HAPS solutions to accelerate their software development, hardware/software integration and validation schedules."