Arithmetic processing IP core for MP3 decoders features smallest circuit size and lowest power consumption

The IP core is a very small circuit of only 32 000 gates plus 76kbit of RAM, consuming just 0.35mW (measured for 44.1kHz 128 kbps Stereo output, with the core implemented in IBM9SFLP process). Typical power consumption for conventional software processing techniques is approximately 4mW based on Murata's research. Its clock rate is less than 20MHz since real time decoding is possible at 6MHz. The core is compliant with relevant MP3 (ISO/IEC11172-3, ISO/IEC13818-3) standards.

The IP core will be made available to customers as a synthesisable soft macrocell. In addition to providing hard macrocells optimised for specific processes, Murata will also address customers' unique requirements.