Analysis
Imec Prominently Presents at IEDM 2012
Imec announced today a high number of engagements at this year’s IEEE International Electron Device Meeting in San Francisco, December 8-12, 2012.Solidifying its leading position as a global R&D center solving key challenges of the International Technology Roadmap for Semiconductors, imec will present one plenary talk, feature two invited presentations, deliver one tutorial, and present 9 papers from imec researchers as first authors and 5 papers as co-author.
“WImec’s papers at IEDM 2012 include:
· Plenary—Luc Van den hove, CEO at imec—Ultimate Transistor and Memory Technologies: Core of a Sustainable Society
· Invited paper—Kurt Ronse et al. —Opportunities and Challenges in Device Scaling by the Introduction of EUV Lithography
· Invited paper—Eddy Simoen et al. —Insights in low frequency noise of advanced and high-mobility channel transistors
· Tutorial—Mustafa Badaroglu—Scaling Challenges Analog Electronics
Memory Devices
-Quantitative and predictive model of reading current variability in deeply scaled vertical poly-Si channel for 3D memories, Toledano-Luque et al.
-Understanding of the endurance failure in scaled HfO2-based 1T1R RRAM through vacancy mobility degradation, Chen et al.
-Ultra thin hybrid floating gate and high-k dielectric as IGD enabler of highly scaled planar NAND flash technology, Kar et al.
Logic Devices
-Beyond interface: the impact of oxide borde traps on InGaAs and Ge n-MOSFETs, Lin et al.
-Phosphorus doped SiC source drain and SiGe channel for scaled bulk FinFETs, Togo et al.
-Stress simulations for optimal mobility group IV p- and nMOS FinFETs for the 14nm node and beyond, Eneman et al.
-Impact of Through Silicon Via Induced Mechanical Stress on Fully Depleted Bulk FinFET Technology, Guo et al.
Design-Technology Exploration
-Standard cell level parasitic assessment in 20nm BPL and 14nm BFF, Schuddinck et al.
More than Moore
-UHF IGZO Schottky diode, Chasin et al.