Pentek's New High Channel Count Software Radio Module Targets Toughest Radar, UAV and Communication Apps

* 8-fold increase in channel count delivers 32 digital down converters
* Four 200 MHz 16-bit ADCs, plus sophisticated gating and triggering modes
* x8 PCI Express interface with four DMA controller channels
* Virtex-6 FPGA supports user customization with GateFlow Design Kit


With 32 channels of multiband DDC, the Model 71662 represents the highest channel count product in our Cobalt family. This is perfect for communication applications where a multitude of channels need to be intercepted and received in parallel, said Rodger Hosking, vice president of Pentek. In addition to the on-board resources, Pentek provides the components that enable customers to easily build, customize and integrate their own system application. GateFlow enables custom FPGA IP (intellectual property) development, and the ReadyFlow board support libraries and command line interface allow engineers to quickly get up and running, he added.
Built-in Acquisition IP

The 71662 provides four transformer-isolated input channels that each supply a Texas Instruments ADS5485 16-bit, 200 MHz ADC. The ADC outputs pass to an input multiplexer that supports four Acquisition IP modules factory-installed in the Xilinx Virtex-6 FPGA. Each IP module can receive data from any of the four ADCs, or from a test signal generator, providing highly flexible input and antenna assignments.

Four 512 MB DDR3 SDRAM memory banks, one for each IP module, can buffer data in a FIFO mode or store data in a transient capture mode. All memory banks have DMA engines for streaming data at up to 1600 MB/second through the PCIe interface to off-board storage or additional processing. These linked-list engines offer a unique acquisition Gate Driven mode in which the gate duration determines the transfer length, eliminating the need for pre-set transfer lengths. To simplify post-acquisition analysis of multi-channel data, the DMA engines can automatically construct meta-data packets that contain information such as channel ID, a sample-accurate time stamp and data length.
Integrated Digital Downconverter Cores

Also contained within each of the four Acquisition IP modules is an 8-channel digital downconverter bank. Each DDC bank has its own decimation setting from 16 to 8192, providing a wide range of independent output signal bandwidths. The decimation FIR filter within each bank accepts a unique set of 18-bit user-supplied coefficients for custom channel shaping. Each of the eight DDC channels within a bank can have its own 32-bit tuning-frequency setting and delivers a complex output stream consisting of 24-bit I and 24-bit Q samples.

The combination of input channel selection, independent decimation controls, and channel bandwidth controls allows quick configuration of the Model 71662 for a wide variety of applications, said Bob Sgandurra, product manager of Pentek. He added, In communications monitoring, for instance, the board can be set to continuously examine wide spectral bands for signals of interest on some channels, and use other channels to zoom in on a detected signal for a detailed narrowband view. The 71662's internal timing bus further expands the module's applicability by supporting the synchronization of multiple modules for even wider channel counts.
FPGA Resources Available

The installed Acquisition IP modules in the 71662's on-board Virtex-6 FPGA allows users to implement their own logic designs. A variety of FPGA sizes are available for the 71662 so that users can obtain as much, or as little, capacity as they need. The SXT devices, for instance, offer up to 2016 DSP slices for applications such as real-time signal demodulation, decoding and forwarding by an UAV monitoring communications in hostile areas. For applications with less-demanding requirements, the lower-cost LXT series is available.

To support custom design in the 71662, Pentek offers the ReadyFlow board support package and the GateFlow FPGA Design Kit. ReadyFlow provides features such as turnkey signal analysis software and a command line interface for controlling the module's operation in an application program. GateFlow includes all of the board's factory-installed IP as documented source code, as well as a library of other functions so that developers can integrate their own IP with Pentek's. All data and control paths are accessible within the FPGA.