Test & Measurement

Xilinx Paves the Way for a New Generation of Automotive Driver Assistance and Infotainment Systems at CES 2012

17th January 2012
ES Admin
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Xilinx will demonstrate at the 2012 International Consumer Electronics Show (CES) the world's first Field Programmable Gate Array (FPGA) based Ethernet Audio/Video Bridging (EAVB) network implementation optimized for carrying high-speed data traffic within the automobile. As consumer expectations for higher resolution displays and graphics quality in their driver assistance, navigation and passenger entertainment systems grow, so do the associated challenges of moving content around the vehicle. The demonstration will highlight the capabilities of the new EAVB Development Kit co-developed with Xilinx Alliance Program member Digital Design Corp.(DDC) to give automotive system developers the framework and tools necessary to accelerate their development of applications that deliver a richer experience for drivers and passengers.
src="/cms/images/old/automotive/pr25638a2.jpg" />CES attendees can visit Xilinx in suite #MP25556 in the Las Vegas Convention Center to see the EAVB demonstration featuring multi-camera driver assistance and infotainment A/V sources streaming, simultaneously on a single network. In addition, a 3D vehicle surround view demonstration built on Spartan®-6 FPGAs, showcases Xilinx's continued commitment to real-time, multi-camera driver assistance solutions.



The IEEE 802.1 EAVB standard is already gaining the attention of a number of leading automotive manufacturers even though the specifications are still being finalized. This isn't surprising because the attractiveness of a fully open, flexible and ubiquitous network standard like Ethernet, enhanced to address the unique real-time media streaming needs of automotive systems, is too difficult to resist, said Nick DiFiore, Director of Xilinx's Automotive Segment. As a founding member of the AVnu Alliance)®, which is dedicated to enabling an ecosystem of compatible EAVB solutions for reliable transport of audio and video content, our work with DDC furthers that goal and is a natural step in our commitment to offer automotive customers a complete array of vehicle connectivity options that enables them to keep pace with rapidly evolving consumer and information technologies.



The EAVB solution expands the previously released Xilinx Ethernet AVB Endpoint LogiCORE® IP into a complete network interface solution, while providing flexibility for addressing a customer's unique application interface needs. The solution also offers maximum integration potential where Xilinx FPGAs are already commonly used. This includes traditional infotainment connectivity (i.e. host processor companion chip) as well as Driver Assistance (DA) applications, where the FPGA is typically performing image processing for features such as surround view, blind spot detection and real-time lane tracking.



Drivers and passengers are not only expecting higher resolution displays and graphics quality, but critical information needs to be displayed in real-time as drivers are using it to make instantaneous decisions, said Scott Keane, Visual Systems Engineer, DDC. This development kit proves that EAVB can deliver world-class audio and video quality to passengers while taking advantage of the same Xilinx FPGA devices already on board many driver assistance systems. The modular IP we've included in the kit is separately licensable so that customers can optimize the solution for their specific application needs.



The emerging IEEE 802.1 AS, QAT and QAV standards, fully implemented in the Xilinx/DDC EAVB solution, provide for high-fidelity, low-latency audio and video transport in a completely deterministic fashion over a 100Mb/1Gb Ethernet-based local area network (LAN). In the automotive environment, this means a single homogenous LAN can be configured to carry a range of infotainment and DA data content, including system control, audio and video information. Further, the system designer can establish any network topology (e.g. star, tree or combination) expanding overall network bandwidth as needed, and up to 75 percent of the bandwidth on any given connection may be reserved to guarantee quality of service for media streaming. The DDC IP cores includes facilities for A/V data packetization, media extraction, media clock recovery and stream reservation protocol, as well as handling of legacy Ethernet traffic for generic data or command/control.



In the Xilinx/DDC demonstration, video data from four different cameras are streamed over an EAVB network to an FPGA where further DA video and graphics processing can be performed (e.g. 3D vehicle surround view). In addition, separate infotainment A/V source streaming to a remote display is performed simultaneously on the same network. Low latency MJPEG video compression is also implemented to further manage network bandwidth.



Spartan-6 FPGAs for Automotive



The EAVB Development Kit is based on the Xilinx Automotive (XA) Spartan-6 FPGA, which provides leading system integration capabilities and the lowest total cost for cutting-edge high-volume automotive applications. The ten-member XA Spartan-6 family delivers expanded densities ranging from 3,840 to 101,261 logic cells, up to 180 parallel DSP MAC engines and comprehensive I/O capability with speeds up to 3.125GHz. Built on a mature 45nm low-power copper interconnect process technology that delivers an optimal balance of cost, power and performance, the XA Spartan-6 family offers an efficient, dual-register 6-input look-up table (LUT) logic configuration and a rich selection of built-in system-level blocks.



Xilinx Automotive (XA) is the programmable engine of choice for many of today's infotainment, driver assistance and driver information systems, and is increasingly adopted in state-of-the-art next-generation systems. Unmatched in reliability and flexibility, XA-qualified devices enhance the driving experience while satisfying rigid automotive quality requirements.



Pricing & Availability



The DDC/Xilinx EAVB Development Kit is currently available from DDC for $9,999 and includes hardware, reference design, and a single-user evaluation IP license.

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