Dynamic test methods tailored to specific applications

Dynamic test methods tailored to specific applications are necessary to simulate real conditions and detect failure effects not visible with static tests.

As a technology leader in dynamic testing of power semiconductors, NI is committed to addressing the industry’s evolving needs. It is leveraging its vast experience and collaborations with customers, academia, and industry groups like ECPE AQG 324 and JEDEC JC-70 to enable customers to meet the latest industry standards:

Dynamic Gate Stress Test System (DGS):

• Utilizs fast voltage shifts to stimulate fault mechanisms at the gate
• In-situ measurements determine relevant parameters to show the long-term effects of dynamic gate stress on the gate oxide
• Fully automated tests cover the extended requirements from the industry and provide detailed reporting for further data analysis.
• Supports up to 240 DUTs with hot/cold plate temperatures ranging from 20 to 200°C.

Dynamic H3TRB & DRB Test System:

• In a setting with a constant temperature and humidity, the DUT is exposed to dynamic drain stimuli with high voltage peaks with a fast rise of voltage. The voltage shifts lead to fast changes of the magnetic field, which have an impact on corrosion
• This procedure accelerates the deterioration of the DUT and possibly also the insulation materials and is the closest to the real-life operational conditions of the DUT
• This test is a prerequisite to make solid statements about the lifetime of SiC and GaN discrete components or modules

Further NI test systems that help customers to qualify their power semiconductors are HTGB (High Temperature Gate Bias), H3TRB (High Humidity High Temperature Reverse Bias), Power Cycling and IOL.