Test & Measurement

Boundary Scan Software Platform features Automatic Program Generator for functional Emulation Test of Bus Components

18th June 2009
ES Admin
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GOEPEL electronic has announced the introduction of a fully automatic program generator specifically for the dynamic test of on-board system bus structures in the context of the Boundary Scan software platform SYSTEM CASCON. The newly developed tools are based on the innovative VarioTAP technology for functional emulation tests and enable a complete automation of the test vector generation, as well as for the error diagnostics for the first time ever.
“With the new tools, we raise the fusion of static Boundary Scan test and dynamic emulation test to a completely new level”, says Thomas Wenzel, Managing Director of the Boundary Scan division of the GOEPEL electronic GmbH. “The high automation level and the independence of the tools from the target microprocessor completely relieve users from manual program code generation without flexibility limitations. Therefore, the entire process not only gets more productive but safer. The dynamic test coverage as well as the error diagnostic quality improve significantly.”

The core element of the new solution is an Automatic VarioTAP test program generator (AVTG) for bus devices. It’s fully integrated in SYSTEM CASCON, hence they use the same project database as the existing Boundary Scan modules.

The AVTG recognises the structural relations between the processor and the connected bus components and generates structural test vectors, which are later attached as emulation tests in real time to the target. In simple terms, it enables the dynamic test of resources connected to the processor, such as communication interfaces, CTC, bus bridge, digital I/O, analog I/O, displays etc with deterministic fault coverage. Therefore the AVTG for bus devices ideally complements already existing VarioTAP® tools for testing dynamic/static storage and programming embedded and external Flash.

The AVTG accesses extensive circuit libraries, as well as VarioTAP models of the target processor. VarioTAP models are modular IP and include all functions for handling a processor for emulation tests or flash programming. While these models are dependent on target processor, the libraries for bus devices are processor independent and completely portable to other projects.

The generation of the test program is based on CASLAN (native CASCON language), source code and can be easily read to aid debugging.

The generated test programs are compatible with all ScanBooster and SCANFLEX JTAG/Boundary Scan controllers of GOEPEL electronic, so no cost intensive processor specific pods are required.

The new emulation test tools are integrated as standard from SYSTEM CASCON version 4.5 and are activated by the licence manager. For users with a valid software maintenance contract the release is free of charge. Due to the software based solution, existent systems and projects can be easily upgraded. CASCON library models for bus devices can be provided by GOEPEL electronic or generated by the users themselves. At the moment, VarioTAP® models are available for more than 200 processors from different vendors and architectures, such as ARM, Atmel, Freescale, Intel, Marvell, NXP, Power PC, Renesas, Texas Instruments, STMicroelectronics and others. Within the recently agreed cooperation with iSYSTEM, this range will be extended to more than 1.000 processors.

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