Boundary Scan Module extends structural Test Coverage to DDR3 Memory Interfaces

”An increasing number of our customers use DIMM sockets for DDR memory modules on their products. With the CION Module™/SO-DIMM204-3 module we offer an effective solution for structural tests of such interfaces”, says Heiko Ehrenberg, General Manager US Operations for GOEPEL electronic. “We’re continuously expanding our CION product line with modules for the test of digital, analogue and mixed-signal interfaces in order to assist our customers in achieving the highest possible test coverage with their JTAG/Boundary Scan tools.”

Murray McFaul, Test Designer at Ross Video Limited, needed to find a quick solution to
solve the limited test coverage they would receive on a new DDR3 SO-DIMM interface. Given the tight project time lines Murray realized that they would not have the time to design their own SO-DIMM test module. A short conversation with GOEPEL electronic assured Murray that they could deliver on this requirement in the time frame that Ross Video needed.
In early March 2010 GOEPEL electronic shipped an evaluation module to Ross Video, which proved (after a short evaluation period) to be the solution they were looking for.
“I have been working with GOEPEL electronic for the past 3 years, the support and response time has always been first class. I have worked with other Boundary Scan solutions providers and I would say that GOEPEL products are of the highest quality in the industry”, says McFaul.

The CION Module™/SO-DIMM204-3 is the 14th member of the CION module family. It is mechanically compliant with JEDEC Std. MO268 and can be plugged directly into the socket to be tested, whereby the voltage configuration for the interface is done automatically. Several CION modules of the same or different types can be cascaded in a daisy-chain configuration, with the TAPs being externally voltage programmable for flexibility.
The module features the CION™ Boundary Scan ASIC for the structural test of all SO-DIMM204 signal and power supply pins. All test channels can be switched input/output/tristate.

This new hardware module is fully supported by all JTAG/Boundary Scan controllers of the ScanBooster™ and SCANFLEX® product families and by the integrated JTAG/Boundary Scan software platform SYSTEM CASCON™. For more than 17 years now, SYSTEM CASCON™ has been the most innovative Integrated JTAG/Boundary Scan Development Environment, featuring currently more than 40 fully integrated tools. Users are able to easily include the CION Module™/SO-DIMM204-3 in CASCON projects, with fully automated test pattern generation. Any defects detected on the UUT can be visualized graphically at pin and net level in layout and schematic displays. Pin Fault Diagnostics processors can generate diagnostic messages for board and system level defects, and ScanAssist debugger tools can be used for failure analysis and for interactive debug sessions.