Test solution meets USB 3.1 challenges

R&D and test engineers who design and test USB 3.1 chipsets are facing new challenges. For receiver test, the doubled physical data rate means the margins for signal integrity are tighter.

To ensure proper operation, the receiver must tolerate a mix of different jitter types. Three-tap de-emphasis is required to compensate for the losses of the channel. And finally, the analyser must be able to filter 128-bit/132-bit coded skip-ordered sets with variable length during error counting.

Benefits of the Agilent USB 3.1 receiver test solution include accurate and repeatable receiver test results enabled by J-BERT’s built-in and calibrated jitter sources and intersymbol interference (ISI) traces and precise emulation of pre- and post-cursor de-emphasis.

It also features built-in clock recovery to reduce setup complexity and error counting accomplished by real-time filtering of the USB 3.1-specific 128-bit/132-bit coded skip-ordered sets (that can vary in length from the pattern stream.

The Agilent USB 3.1 receiver test solution consists of either the enhanced J-BERT N4903B high-performance serial 12,5Gb/s BERT with its integrated jitter sources and ISI and the N4916B de-emphasis signal generator or the J-BERT M8020A high-performance 16Gb/s BERT with integrated and calibrated jitter sources (random jitter, period jitter, SSC), 8-tap de-emphasis and M8048A ISI channels.