Digital module EDA link boosts SoC testing
A 1.6 GBit per second digital module from Advantest incorporates a new feature called Functional Test Abstraction Plus (FTA+) to achieve protocol-aware testing in which the tester communicates directly with the devices under test (DUT) in each IC’s protocol language. Advantest says that the T2000 digital module will improve efficiency in testing system-on-chip (SoC) devices on the T2000 test platform.
A powerful EDA-Link, called FTA-Elink, connects the design simulator to the T2000 test platform directly. In addition, Verilog code can run on the T2000 EPP (Enhanced Performance Package) system with the 1.6GDM module.
By equipping the tester’s pattern generator with protocol-aware engines capable of independent timing and memory functions, protocol-based I/O can be natively measured, enabling efficient multi-site and concurrent testing. This allows customers to significantly accelerate their design to tape-out for faster time to market.
The new module has a vector mode that makes it fully compatible with Advantest’s existing 1GDM digital module while offering improved throughput and reliability.
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