Search results for "photon chips"
Assembleon Highlights Electricity Cost Savings In Pick & Place At This Year’s Ipc Apex
Assembléon is stressing the value of energy efficient pick & place at this year's IPC APEX Expo (Las Vegas April 12-14, Booth 508). While saving up to $10.000 in operating costs alone per pick & place machine per year, the low energy consumption of all A-Series solutions in the market today help to drastically reduce the SMT industry’s carbon footprint. The company is also using APEX to announce the extension of its compact, modular and econom...
AssemblÉon Robot Reduces Cost Of Memory Module And Back-end Semiconductor Manufacturing
Royal Philips Electronics subsidiary Assembléon’s recently released Twin Placement Robot (TPR) is reducing the cost of placement for memory module assembly, and will soon be doing the same for semiconductor backend manufacturing. The TPR fits on Assembléon’s A-Series pick & place equipment to give a single platform that can place up to 110,000 ICs and chip components per hour – eliminating the need for a separate line balancing machine. T...
Assembleon Robot Reduces Cost Of Memory Module And Back-end Semiconductor Manufacturing
Royal Philips Electronics subsidiary Assembléon’s recently released Twin Placement Robot (TPR) is reducing the cost of placement for memory module assembly, and will soon be doing the same for semiconductor backend manufacturing. The TPR fits on Assembléon’s A-Series pick & place equipment to give a single platform that can place up to 110,000 ICs and chip components per hour – eliminating the need for a separate line balancing machine. T...
Two International Industry Awards For Assembleon's Twin Placement Robot
Assembléon’s Twin Placement Robot, the latest addition to its A-Series pick & place equipment, has been received multiple innovation awards at this year’s Nepcon China in Shanghai. The Twin Placement Robot (TPR) received EM Asia’s Innovation award 2011 in the high volume assembly category. In the same category it also received the award for best exhibited technology from the SMT Association China.
Rohde & Schwarz delivers the world's first RF test systems for acceptance testing of VAMOS-capable mobile devices
The R&S TS8950G and R&S TS8980S RF test systems from Rohde & Schwarz now allow conformance and precompliance testing for VAMOS. Using VAMOS, network operators can double the channel capacity of GSM base stations.
Zoran Deploys Cadence Virtuoso Software for Complex, Advanced Technology, Mixed-Signal Chip
Cadence Design Systems today announced that Zoran Corp., a leading provider of digital solutions in the digital entertainment and imaging markets, taped out a complex, advanced technology mixed-signal chip using the Cadence® Virtuoso® suite of design and simulation products. Zoran adopted the Virtuoso technology to address the growing complexities and challenges its engineers faced moving to advanced nodes.
AppliedMicro Standardizes on Cadence Encounter Digital Implementation System
Cadence Design Systems today announced that Applied Micro Circuits Corporation has selected the Cadence Encounter Digital Implementation (EDI) System for its large, complex advanced-node designs. EDI System joins other multiprocessing-capable offerings in the AppliedMicro methodology to form a standardized design infrastructure based set of tools.
Cadence Contributes Technology to Boost Verification of Complex Mixed-Signal Chips
Cadence Design Systems announced that it has contributed to the Accellera standards organization new technology that can help engineers conduct faster and more thorough functional verification on complex mixed-signal SoCs. Cadence donated a set of extensions to the wreal feature of the Verilog-AMS real numbered modeling capability. These Cadence extensions are designed to improve accuracy and offer better plug-and-play with analog models. Wreal e...
Cadence Expands Proven NAND Flash Design IP Offering with ONFI 3 PHY and Controller
Cadence Design Systems, Inc. today announced it has expanded its Flash IP offering to include support for the Open NAND Flash Interface (ONFI) 3.0 specification. Cadence is the first company to provide a combined ONFI 3 controller and PHY IP solution, significantly streamlining SoC and system design while ensuring an optimized ONFI 3 implementation for maximum performance. Cadence Flash IP, including the broad portfolio of Denali IP acquired in ...
Cadence Accelerates High-Performance, Giga-scale, 20nm Design with Next-generation Encounter RTL-to-GDSII Flow
Cadence Design Systems, Inc. today introduced the latest release of Cadence Encounter RTL-to-GDSII flow for high-performance and giga-scale designs, including those at the latest technology node, 20 nanometers. Developed in close collaboration with leading IP and foundry partners and customers, the new RTL-to-GDSII design, implementation and signoff flow enables more efficient development of SoCs, meeting and exceeding the power, performance and ...