Search results for "NTT Corporation"

Lattice Semiconductor Corporation announced plans to interoperate between Cavium Networks’ OCTEON II CN63XX processors and the LatticeECP3™ FPGA family via a Serial Rapid IO (SRIO) Specification 2.1 link. SRIO is commonly used in 3G/4G wireless base stations and wireline switches and routers where low latency is critical. Cavium’s OCTEON II processor incorporates two to six cnMIPS64® cores, the most advanced third generation hardware ac...

Lattice Semiconductor today announced the immediate availability of its full rate SPI-4.2 solution based on a low cost, low power FPGA fabric. Consisting of a LatticeECP3™ FPGA and a Lattice-developed soft Intellectual Property (IP) core, the solution is fully compliant with the Optical Internetworking Forum’s (OIF) System Packet Interface Level 4 (SPI-4) Phase 2 Revision 1 Standard, a popular parallel interface found in telecom/datacom appl...

Lattice Semiconductor Corporation today announced that samples of the LatticeECP3-150 FPGA, the highest-density device in its high-value, low-power ECP3 mid-range FPGA family, are now generally available. Samples have already been shipping to select customers since July of this year.

Lattice Semiconductor today announced it will collaborate with Beyond Semiconductor in the development of compiler tools for Lattice's soft processors. The collaboration will include updates and performance improvements for Lattice's embedded processor IP compilers and development tools.

Lattice Semiconductor announced release 1.2 of its Lattice Diamond FPGA design software tool suite, the flagship design environment for Lattice FPGA products. Users of the new MachXO2 PLD devices can now generate complete systems based on the LatticeMico8 open source 8-bit controller core using the LatticeMico™ System tool, which is available with the Lattice Diamond design environment.

Lattice Semiconductor announced the immediate availability of three new low-cost I/O Breakout Boards: the MachXO 2280 Breakout Board, the ispMACH® 4256ZE Breakout Board and the Power Manager II POWR1014A Breakout Board.

Lattice Semiconductor announced full support for Aptina’s High-Speed Serial Pixel Interface (HiSPi) using LatticeXP2TM FPGAs. The LatticeXP2 HiSPi bridge reference design allows any Image Signal Processor (ISP) with a traditional CMOS parallel bus to interface with an Aptina HiSPi CMOS sensor.

Many approaches to power management sacrifice speed, cost or overall reliability. They impede the design process by requiring the consideration of hundreds of parts from different vendors, require the writing of microprocessor code and, if any hardware and timing changes need to be implemented, the board will require a respin.

Lattice has announced the availability of a new 0.8-mm pitch 256-pin Chip-Array BGA (caBGA256) package for its popular MachXO PLD family that provides designers with a broader range of package options for implementing cost-sensitive, board space constrained designs. The Mach XO640, XO1200 and XO2280 devices are now available in the 14 x 14 mm, caBGA256 package with up to 211 user I/O. The new packages provide designers with 10% lower cost and 30%...

Lattice Semiconductor has announced that it has shipped over 25 million MachXO PLDs. Broadly adopted in a wide range of high volume, cost sensitive applications, customers worldwide are using the MachXO PLD family due to its unparalleled ease-of-use, flexibility, system integration and price.