Search results for "EDA"

Cadence Design Systems today introduced a qualified 32/28-nanometer reference flow targeting Common Platform technology. Cadence® collaborated closely with members of the Common Platform alliance—IBM, GLOBALFOUNDRIES, and Samsung Electronics—to develop a comprehensive flow from RTL synthesis to GDSII signoff for the advanced node, low-power high-k metal gate (HKMG) process technology.

Cadence Design Systems, Inc. (NASDAQ: CDNS), a global leader in electronic design innovation, today introduced a new holistic approach to Silicon Realization that moves chip development beyond a patchwork of point tools to a streamlined end-to-end path of integrated technology, tools, and methodology. This approach represents a stark turn from the discrete and compartmentalized ways semiconductor and systems companies have traditionally achieved ...

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Andes Technology, a Taiwanese provider of high-performance, low-power 32-bit processor IP and SoC platforms, has adopted the Cadence® digital front-end low-power design flow. The flow, based on the Common Power Format (CPF), deploys Cadence synthesis, simulation and formal verification technology. It enables Andes to provide its cus...

Cadence Design Systems today announced that Fujitsu Semiconductor Limited now supports the Cadence® C-to-Silicon Compiler for high-level synthesis in ASIC design flows. C-to-Silicon Compiler is the only high-level synthesis tool that embeds production RTL synthesis--Cadence Encounter® RTL Compiler--to generate implementation-ready RTL for the target application. This delivers a predictable flow from transaction-level model (TLM) to GDSII, with ...

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, announced today that it has signed an agreement with Realtek Semiconductor Corp., a leading IC design house in Taiwan, that establishes Cadence as Realtek's strategic electronic design automation (EDA) solutions provider.

Cadence Design Systems opened its annual CDNLive! EMEA user conference in Munich with a call to action for the semiconductor and EDA industries to join in embracing the EDA360 vision. Now in its fifth year, CDNLive! brings together Cadence® technology users, developers and industry experts to discuss design challenges and cost-effective solutions. More than 550 delegates from over 130 companies and universities attended the conference.

Cadence Design Systems, the global leader in EDA360, today announced that VIA Technology’s microprocessor subsidiary, Centaur Technology, achieved significant quality and time-to-market benefits by using the Cadence® Virtuoso® Space-Based Router on its latest set of processors. Centaur used the Cadence router to help design its new 65-nanometer Nano 3000 Series processors, designed to bring enhanced digital media performance and lower power c...

Cadence Design Systems, Inc. (NASDAQ: CDNS), the global leader in EDA360, today announced the Cadence Open Integration Platform, a platform that significantly reduces SoC development costs, improves quality and accelerates production schedules.

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that it is first to market with a licensable, wide I/O memory controller core, along with an integration environment, that brings PC-like performance to mobile applications like smartphones and tablets.

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, inaugurates its annual series of technical user conferences with CDNLive! EMEA (Europe, Middle East, and Africa), to be held May 3-5 at the Dolce Hotel in Munich. The worldwide CDNLive! events bring together thousands of Cadence® technology users, developers, and industry experts to examine challenges and synthesize solutions for developing innovative e...