Search results for "Altera"

Micronas today announced the availability of HAL 880 in SOIC8 package. SMD packaging eliminates many cost adding processes, such as the leads bending process, often necessary for leaded packages such as the TO92. The HAL 880 in SOIC8 combines high performance sensor technology with a cost-effective, manufacturing friendly package, leading to attractive cost improvements at the system level.

A high-speed, high-temperature HT200S laboratory digester from HACH LANGE has helped one of Europe’s largest recycled packaging companies to cut analysis times by 75%.

Tundra Semiconductor Corporation, a leader in System Interconnect, today introduced an evaluation platform centered on its Tsi620TM multi-standard RapidIO Switch. In addition to the Tundra Tsi620, the multi-platform evaluation platform uses Texas Instruments (TI) TMS320TCI6487 high performance multi-core DSP and an Altera Stratix III FPGA to enable prototyping and, ultimately, cost reduction in applications such as high performance wireless and ...

Offering an easy-to-use, low-cost way to evaluate soft-core embedded processors, Arrow Electronics has announced its BeMicro software development kit (SDK). The BeMicro SDK enables software developers and hardware engineers to easily evaluate Altera's Nios II embedded processor and help simplify their embedded designs.

The Hybrid Memory Cube Consortium (HMCC), led by Micron Technology, Inc. and Samsung Electronics Co. Ltd. today announced that Microsoft Corp. has joined the consortium. The HMCC is a collaboration of original equipment manufacturers (OEMs), enablers and integrators who are cooperating to develop and implement an open interface standard for an innovative new memory technology called the Hybrid Memory Cube (HMC).

The Hybrid Memory Cube Consortium, led by Micron Technology and Samsung Electronics, have today revealed that its developer members have released the initial draft of the Hybrid Memory Cube interface specification to a rapidly growing number of industry adopters. Issuance of the draft puts the consortium on schedule to release the final version by the end of this year.

Algotronix Ltd.,announces that it is shipping MACsec cores that are used to secure data on Ethernet links at up to 10 Gbps. The Media Access Control Security (MACsec) products comply with the requirements of IEEE 802.1AE. They are available as intellectual property cores for FPGAs or SoC technology to cover the needs of gigabit Ethernet for 1 GbE and 10 GbE throughputs.

Peratech, the innovators in touch technology, have developed a see through version of their award winning, Quantum Tunnelling Composite (QTC™) material called QTC Clear™. This force sensing material can be used to create a whole new class of Force Sensitive touch screens that can completely replace current Resistive touch screen technologies or enhance Capacitive ones to create superior solutions with more features such as 3D input.

Geotest has announced the release of new, high performance PXI and PXI Express FPGA modules. The GX3700 and GX3700e FlexDIOs use the Altera Stratix III FPGA, which can support SerDes data rates to 1.25GHz/sec and I/O data rates to 700MHz. Additionally, both cards include 256K x 32 of SSRAM as well as integrated DMA capability. For applications that require high data throughput, the GX3700e offers the ability to stream data to and from the host co...

Flexras Technologies today announced Wasga Compiler, a software tool that boosts multi-FPGA design performance. Wasga Compiler is unique and is the first timing-driven, multi-FPGA partitioning software for ASIC and SoC prototyping. It typically delivers a 10X clock frequency increase, runs blazingly fast, handles multi-billion ASIC gates equivalents designs, and maps them to any Altera or Xilinx board, whether it’s off-the-shelf or custom.