Search results for "EDA"
Cadence And TSMC Strengthen Collaboration On Design Infrastructure For 16nm FinFET Process Technology
Cadence Design Systems announce an ongoing multi-year agreement with TSMC to develop the design infrastructure for 16-nanometer FinFET technology, targeting advanced node designs for mobile, networking, servers and FPGA applications. The deep collaboration, beginning earlier in the design process than usual, will effectively address the design challenges specific to FinFETs – from design analysis through signoff – and will deliver the infrast...
Oasys Design Systems Announces Register Retiming Capability
Oasys Design Systems announced today that register retiming capability for improved quality of results is now available in the Oasys RealTime synthesis engine. The Oasys RealTime synthesis engine is the core technology of the Oasys RealTime Explorer and Designer products, the only EDA tools that produce the same implementation accurate results for RTL exploration and physically-aware synthesis.
Kilopass Appoints Industry Veteran Dana Reyes Vice President of Finance To Scale Business Expansion
Kilopass Technology announced today that Dana T. Reyes has been appointed vice president of finance, reporting to Kilopass CFO James T. Lindstrom. Ms. Reyes brings to Kilopass over 20 years of public and private company finance, accounting and operations know how including broad experience in initial public offering (IPO), mergers and acquisitions (M&As) and financial auditing at a Big 4 CPA firm. Ms. Reyes starts immediately.
CST STUDIO SUITE 2013: Update Webinar Series
It’s that time of year again. This year’s release of CST STUDIO SUITE is getting the finishing touches and should be on its way to our customers around the world very soon. Along with user manuals, tutorials, an overview of advanced topics, and tips on installing and getting you started, we’ve also organized for a few of our experts to demonstrate the new features through an update webinar series.
ARM and TSMC Tape Out First ARM Cortex-A57 Processor
ARM and TSMC today announced the first tape-out of an ARM Cortex-A57 processor on FinFET process technology. The Cortex-A57 processor is ARM’s highest performing processor, designed to further extend the capabilities of future mobile and enterprise computing, including compute intensive applications such as high-end computer, tablet and server products.
Agilent Technologies Launches Recognition Program For EDA Experts
Agilent Technologies has today announced its Agilent Certified Expert recognition program for electronic design automation experts. Eligible participants include individuals demonstrating a high level of expertise—both theoretical and practical—in applying Agilent EEsof EDA tools for product design and modeling.
Agilent To Demo Latest RF Circuit, System And 3-D EM Design & Simulation Solutions At WAMICON
Agilent Technologies announce that it will demonstrate its latest RF circuit, system and 3-D electromagnetic design and simulation solutions at the 14th annual IEEE Wireless and Microwave Technology Conference. WAMICON 2013 will be held April 7-9 at the Caribe Royale Hotel and Convention Center in Orlando, Fla. A gold-level sponsor of the event, Agilent will have technical experts and application engineers available for informal discussions and d...
Agilent Technologies' EEsof YouTube Channel Passes Half-Million View Mark
Agilent Technologies today announced that its Agilent EEsof EDA channel on YouTube has surpassed half a million views and 1,300 subscribers. The Agilent EEsof YouTube channel features over 275 videos offering detailed application information on electronic design automation software from Agilent EEsof, including Advanced Design System, Genesys, EMPro, GoldenGate, SystemVue, and the company's suite of device-modeling software.
EU-Funded SYNAPTIC Project Delivers State-of-the-Art Design-Synthesis Tool Flow
A joint industry/academia consortium, supported by the European Union’s Seventh Framework Programme, has reported the successful conclusion of a three-year project and the release of its design-synthesis tool flow and related litho-friendly cell libraries and evaluation metrics. The SYNAPTIC research project included eight partner organizations from across Europe and Brazil who worked together to develop innovative regularity-centric design met...
Integration Of Tanner EDA And Incentia Tools Increases Capabilities And Productivity
Tanner EDA has revealed that it has integrated the DesignCraft and TimeCraft digital design tools from Incentia Design Systems into Tanner EDA's HiPer Silicon AMS solution. DesignCraft is Incentia's complete logic synthesis tool with integrated capability to synthesize and optimize for area, power, timing, and design-for-testability. TimeCraft is Incentia's high-speed, big-capacity, static timing analyzer for nanometer timing analysis and sign-of...