Search results for "ICs"
GN ReSound Standardizes on Magma Talus to Increase Performance and Minimize Power on Next-Generation ICs
Magma Design Automation has standardized on the Talus® implementation system for its next-generation ICs. GN ReSound selected Talus after encountering difficulty closing timing while meeting low-power requirements on a critical design with its previous tools. Talus delivered a fast, predictable and repeatable flow that allowed GN ReSound to quickly perform trial place-and-route runs to find the optimal power/performance tradeoff.
Magma Acquisition by Synopsys to Provide Customers with State-of-the-Art Mixed-Signal, Digital and Analog Design Solutions that Enable More Profitable Silicon
Magma Design Automation has announced the company has entered into a definitive agreement to be acquired by Synopsys. The combination of the two companies’ technologies, development capabilities, support teams and sales channels will provide chip designers with greater access to state-of-the art electronic design automation (EDA) solutions that enable more profitable silicon.
AssemblÉon Robot Reduces Cost Of Memory Module And Back-end Semiconductor Manufacturing
Royal Philips Electronics subsidiary Assembléon’s recently released Twin Placement Robot (TPR) is reducing the cost of placement for memory module assembly, and will soon be doing the same for semiconductor backend manufacturing. The TPR fits on Assembléon’s A-Series pick & place equipment to give a single platform that can place up to 110,000 ICs and chip components per hour – eliminating the need for a separate line balancing machine. T...
Assembleon Robot Reduces Cost Of Memory Module And Back-end Semiconductor Manufacturing
Royal Philips Electronics subsidiary Assembléon’s recently released Twin Placement Robot (TPR) is reducing the cost of placement for memory module assembly, and will soon be doing the same for semiconductor backend manufacturing. The TPR fits on Assembléon’s A-Series pick & place equipment to give a single platform that can place up to 110,000 ICs and chip components per hour – eliminating the need for a separate line balancing machine. T...
Samsung and Cadence Deliver 20nm Digital Design Methodology
Cadence Design Systems, Inc. today announced that Samsung Electronics and Cadence have collaborated to deliver a 20-nanometer design methodology that incorporates double patterning technology for joint customer deployment and internal test chips. The collaboration between Cadence and Samsung brings new process advances for mobile consumer electronics, enabling design at 20 nanometers and future process nodes.
ABI Electronics at Global Technology Awards 2009
ABI Electronics, a leading manufacturer of test and measurement equipment, and Cupio, a technology partner and supplier of test solutions, are hoping for a win at the upcoming Global Technology Awards in November. The competition, sponsored by the Global SMT & Packaging magazine, recognises the verybest innovations in the PCB and electronics world.
GLOBALFOUNDRIES enters a broad strategic partnership with imec
GLOBALFOUNDRIES, one of the world’s leading semiconductor foundries, has signed a strategic long-term partnership on sub-22nm CMOS scaling and GaN-on-Si technology with the nanoelectronics R&D center imec.
Imec reports progress in deep sub-micron scaling for logic and memory
At the International Electron Devices Meeting in San Francisco imec’s advanced CMOS research program reports promising advances in scaling logic, DRAM and non-volatile memory. A new device based on non-silicon channels was realized to scale high-performance logic towards the sub-20nm node. Moreover, imec developed low-leakage capacitors allowing DRAM to be pushed to the 2x nm node. And the switching mechanism of resistive RAM for next-generatio...