Search results for "ASIC"
Synopsys introduces Synphony High Level Synthesis
Synopsys has introduced its Synphony HLS (High Level Synthesis) solution that integrates M-language and model-based synthesis to deliver up to 10X higher design and verification productivity than traditional RTL flows for communications and multimedia applications. Synphony HLS creates optimised RTL for ASIC and FPGA implementation, architecture exploration and rapid prototyping. In addition, Synphony HLS complements C/C++-based flows by generat...
HAPS-60 Series from Synopsys deliver highest performance, highest capacity, pre-tested IP and unique advanced verification functionality
Synopsys introduced the HAPS-60 series of rapid prototyping systems—a comprehensive solution that eases complex SoC design and verification challenges. The HAPS-60 series, part of the Confirma(tm) Rapid Prototyping Platform, is an easy-to-use and cost-effective rapid prototyping system that enables early hardware/software co-verification and system-level integration at near-real-time run-rates, using at-speed, real-world interfaces.
Synaptics - ClearPad multi-touch touchscreen solution
Expanding its portfolio of ClearPad solutions, Synaptics has introduced its advanced multi-touch ClearPad 3000 Series capacitive touch sensor solution. Building upon the success of Synaptics’ patented, flagship ClearPad touchscreen solution, the new 3000 Series offering combines Synaptics’ best-in-class ClearPad sensing technology with the company’s exclusive design-in services which helps to make it easier for OEMs and ODMs of mass-market ...
Lattice Simplifies System Control Applications with MachXO Control Development Kit
Lattice Semiconductor has announced the immediate availability of the new MachXO Control Development Kit as well as 12 new reference designs, ideal for prototyping system control functions such as temperature and current monitoring, power supply sequencing, fan control and fault logging, that are commonly found in telecom infrastructure, server, industrial and medical applications. The new kit offers designers of CPLDs and low-density FPGAs a com...
Global Unichip Corporation Selects ARM Technology for a Wide Variety of Applications in Emerging Markets
ARM selected for its low power credentials and comprehensive ARM Partner ecosystem to address low- and high-end applications, such as smart phones, tablets and smart TVs
Arm - 32NM Cortex-A9 Processor Optimizations
ARM today announced its newest optimization package for the ARM Cortex-A9 processor, targeting Samsung 32nm LP High-K Metal Gate (HKMG) process technology. This ARM Processor Optimization Pack (POP) provides a highly tuned foundation for implementing Cortex-A9 processors in low power, mobile applications. Based on ARM Artisan® optimized logic and memory physical IP, the POP is also supported by implementation knowledge and ARM benchmarking, pr...
Aitech Appoints James Fults to Director of Engineering for Space Business Sector
Aitech Defense Systems Inc., a pioneer in embedded systems design and development products for space applications, has promoted James Fults to director of engineering for the company’s space business sector. Fults replaces Anthony Lai.
Rochester Reintroduces LSI CMOS Gate Array Product Line
Rochester Electronics, the world's largest authorized manufacturer and distributor of end-of-life and mature semiconductors, is providing continuing manufacturing services of LSI Corporation's entire HCMOS (high-speed complementary metal-oxide semiconductor) ASIC (application-specific integrated circuits) gate array product offering.
Xilinx ISE Design Suite 12.3 Introduces AMBA 4 AXI4 IP Cores, Enhances PlanAhead Design and Analysis Cockpit, Extends Power Optimization
Xilinx announced the release of ISE Design Suite 12.3, kicking-off the FPGA leader's roll-out of Intellectual Property (IP) cores that meet the AMBA(R) 4 AXI4(TM) specification for interconnecting functional blocks in System-on-Chip (SoC) design, as well as introducing productivity enhancements to the PlanAhead(TM) Design and Analysis cockpit, and Intelligent Clock Gating support for reducing dynamic power consumption in Spartan(R)-6 FPGA designs...
Xilinx ISE Design Suite 11 Wins 2010 DesignVision Award
The annual IEC DesignVision Awards program recognizes new technologies, applications, products and services that are judged to be the most unique and beneficial to the industry and was selected by a panel of judges comprised from members of the DesignCon 2010 Technical Program Committee. The committee consists of industry experts in the semiconductor and electronic design engineering community. The domain-specific approach of the ISE Design Suite...