Search results for "ASIC"

Mentor Graphics today announced the 10.2 release of the Questa functional verification platform, a tightly integrated and extensible set of tools and solutions that is transforming the functional verification of complex System-on-Chip and FPGA designs.

Byte Paradigm has released two new versions of SPI Storm - SPI Host Adapter that supports, SPI, Quad-SPI and custom serial protocols in the same USB device. SPI Storm 50 and SPI Storm 10 support serial protocols as master up to 50 MHz and 10 MHz, at entry-level prices of 399,00 EUR (530 USD) and 299,00 EUR (400 USD) respectively. SPI Storm 10 features a 8 MB memory, while the higher end devices are equipped with a total 32 MB memory.

Powervation have today announced the release of PowerSMART v1.1, an updated version of their design tool, as well as, the release of a new PV3012 firmware for the PMBus compliant dual-phase digital controller. The PowerSMART design tool allows users to communicate with and configure the Powervation digital power control ICs (e.g., PV3101 and PV3012) from their laptop using a standard USB connection.

STMicroelectronics announced today the achievement of another major milestone in its testing of its 28nm FD-SOI Technology Platform. Following the Company’s December announcement of the successful manufacturing of System on Chip integrated circuits, ST today announced that application-processor engine devices manufactured at the Company’s Crolles, France fab, were capable of operating at 3GHz with even greater power efficiency at a given oper...

STEC today introduced a pair of two-Terabyte (2TB) Peripheral Component Interconnect Express (PCIe) and Serial-attached SCSI SSD drives – each with select versions supporting unlimited writes – becoming the first supplier to offer 2TB SSDs with both interfaces.

The DLIN, DCD’s IP Core for Local Interconnect Network, is an ideal solution most of all for automotive designs. As technologies and facilities implemented in a car grow every year, the need for a cheap serial network has arisen. That’s why LIN seems to be the most suitable solution to integrate intelligent sensor devices or actuators in today’s cars. Contrary to the CAN, it enables cost competitive serial communication, building the same a...

Digital Core Design has introduced the DT8051. The newest IP Core from Poland is the world’s most powerful tiny 8051 available on the market. The complete system with peripherals and the DoCD debugger needs just 6 650 ASIC gates, when a standalone CPU utilizes little else than 3k gates.

Synaptics Inc today announced that its ClearPad 7300 single-chip premier solution drives the touch interface of the Razer Edge Pro Gaming System tablet. The Razer Edge tablet was officially announced at this year’s Consumer Electronics Show in Las Vegas and was awarded CNET's Best of CES 2013 honors in the Best Gaming, People’s Voice and coveted Best of Show categories for its innovative concept and design by bringing PC gaming capabilities t...

Agilent have announced that it will be demonstrating a 32-Gb/s bit error ratio tester with fast rise time and higher output amplitude at DesignCon (Booth 201) in Santa Clara Convention Center, Jan. 29-30. A new era of data center infrastructure enabling cloud computing, big data and analytics is driving the development of new high-speed data transfer standards such as 100-Gb Ethernet and 32-Gb Fibre Channel.

Cadence Design Systems announced that Avago Technologies used Cadence Encounter Digital Implementation (EDI) System to accelerate the design schedule and boost engineering productivity on a large-scale 28-nanometer networking chip. Avago achieved performance of 1GHz, a 57 percent improvement compared to the previous software.