Test & Measurement
GOEPEL VarioTAP Emulation Test Extended To Energy Micro Giant Gecko
GOEPEL electronic announce special model libraries for the Energy Micro EFM32GGxxx micro controller series supporting the innovative emulation technology VarioTAP. Users are now able to utilize the processor as native instruments for prototype hardware design validation, production test and Flash programming. Higher test coverage is enabled by dynamic and customer-specific tests. For all test and programming methods, a unified environment including VarioTAP model library is provided.
“PAbout EFM32GGxxx:
The EFM32GGxxx are energy-saving micro controllers, designed for ultra-low power applications. They are based on a 32 bit ARM Cortex M3 RISC processor with clock frequencies of up to 48 MHz. They provide low power consumption but flexible periphery and Flash components of up to 1 MB. They are integrated in BGA, QFN or QFP housings that allow no contact with external instruments. VarioTAP provides design embedded tools for testing, hardware debugging, Flash programming and design validation after chip mounting.
About the EFM32 Giant Gecko Starter Kit:
The EFM32 Giant Gecko Starter Kit includes functionalities such as debugger and onboard power monitoring as well as all additional characteristics to demonstrate the EFM32 Gecko MCU 400 nA sleep mode and the built-in 1 MB Flash memory. Equipped with an ARM Cortex M3 processor, the MCUs are able to drive TFT directly, additionally offering low-energy peripherals such as timer, UART and a peripheral reflex system for autonomous operations. Furthermore, the Giant Gecko STK provides light, metal and contact sensors.
Developers may test the unique Gecko LESENSE low-energy sensor interface, which allows for the passive scanning of 16 sensors with host intervention. The multitude of opportunities is completed by a USB interface, 32 MB onboard Flash, LCD and many LEDs and buttons.
About VarioTAP:
VarioTAP is a technology for processor emulation developed by GOEPEL electronic. Thereby, a processor is reconfigured to provide design-integrated test and programming instruments via the native debug port. A respective VarioTAP model, as part of an extensive IP library, contains all relevant access information for the respective target processor. On this basis users can select a processor corresponding to their design and be able to test and validate the connected hardware unit as well as program Flash memories.