/> Of the two embedded Virtex®-5 FPGAs, one is expressly available for custom in-line signal processing. As a Xilinx Alliance Program partner, Signatec created standardized data and control interfaces that are customer accessible along with VHDL source code examples that demonstrate the use of these interfaces to simplify real-time processing tasks through its optional firmware development kits.

“The PX14400’s advanced performance, high degree of flexibility and scalability continues to demonstrate Signatec’s commitment to its customers,” said Anthony Hunt, Chief Technology Officer at Signatec. “By relying on the Virtex-5 FPGA family to deliver embedded processing and serial transceiver capabilities, combined with Signatec’s growing suite of development libraries for FPGA programming, Signatec delivers exceptional value for engineers in the aerospace, defense and intelligence communities.”

Precise Sampling Rate Flexibility

Beyond its high-speed, multi-channel, high-resolution performance capabilities, the PX14400’s frequency synthesized clock allows the ADC sampling rate to be set to virtually any value from 58 MHz to 400 MHz, offering maximum flexibility for sampling rate selection. Additional divide-by-2 circuits are provided for sampling at even lower frequencies. This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock. The ADC may also be clocked from an external clock source.

This level of accurate clock tuning without sacrificing performance gives the best integrated onboard ADC clock flexibility in the industry. Users no longer need to settle for fixed clocks or limiting divide-by-2 clocks only. This feature is ideal for undersampling applications, where the Nyquist bands need to be perfectly tuned to optimally place the center frequency of the sampled signal into the middle of the Nyquist zone and to optimize for the total bandwidth or data captured. In addition to the onboard clock capabilities, the ADC may also be clocked from an external clock source.

Up to five PX14400 boards may be interconnected in a Master/Slave configuration via a ribbon cable that connects at the top of the board. In this configuration, clock and trigger signals from the Master board drive the Slave boards for synchronized sampling across all boards. Additional boards can be synchronized, even across computer chassis, when using Signatec’s Sync1500-6 product. The PX14400 supports single shot, segmented, and pre-trigger triggering modes.

Time Stamps

In Segmented Mode, “time stamps” allow for storing the time relationship between the memory segments. Time Stamps are 64 bit timer values with a clock resolution of 5.0 nanoseconds, and are accumulated in a 2048 element FIFO memory separate from the data. If necessary, time stamps may be read during acquisition in order to prevent overflow. This is possible in any acquisition mode.

“Signatec’s PX14400 is one of the highest-performance digitizers available on the market today,” said Tom Wagner, Director of Marketing for Signatec, Inc. “Users can stream the two synchronized wideband, high-resolution A/D channels directly to Signatec’s high-speed, turnkey RAID storage systems or into the high-performance Xilinx Virtex-5 FPGA with embedded programs such as FFTs, FIRs, DDC and channelization to process their signal data in real-time.”